SN74CB3Q3306A-EP Datasheet, PDF (4/15 Pages) Texas Instruments – Dual FET Bus Switch 2.5-V/3.3-V Low-Voltage High-Bandwidth Bus Switch

SN74CB3Q3306A-EP
SCDS352 – DECEMBER 2013
www.ti.com
THERMAL INFORMATION
THERMAL METRIC⁽¹⁾
SN74CB3Q3306A-EP
PW
UNITS
θ_JA
θ_JCtop
θ_JB
ψ_JT
ψ_JB
θ_JCbot
Junction-to-ambient thermal resistance⁽²⁾
Junction-to-case (top) thermal resistance⁽³⁾
Junction-to-board thermal resistance⁽⁴⁾
Junction-to-top characterization parameter⁽⁵⁾
Junction-to-board characterization parameter⁽⁶⁾
Junction-to-case (bottom) thermal resistance⁽⁷⁾
8 PINS
190.6
74
119.4
12
117.7
N/A
°C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter, ψ_JT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ_JA, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, ψ_JB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ_JA , using a procedure described in JESD51-2a (sections 6 and 7).
(7) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
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RECOMMENDED OPERATING CONDITIONS⁽¹⁾
MIN MAX UNIT
V_CC
Supply voltage
V_IH
High-level control input
voltage
V_CC = 2.3 V to 2.7 V
V_CC = 2.7 V to 3.6 V
V_IL
Low-level control input
voltage
V_CC = 2.3 V to 2.7 V
V_CC = 2.7 V to 3.6 V
V_I/O
Data input/output voltage
T_J
Operating junction temperature
2.3 3.6 V
1.7 5.5
V
2 5.5
0 0.7
V
0 0.8
0 5.5 V
–55 125 °C
(1) All unused control inputs of the device must be held at V_CC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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