SN74AHC1G02_16 Datasheet, PDF (4/22 Pages) Texas Instruments – SN74AHC1G02 Single 2-Input Positive-NOR Gate

SN74AHC1G02
SCLS342M – APRIL 1996 – REVISED DECEMBER 2014
www.ti.com
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)⁽¹⁾
V_CC
Supply voltage range
V_I
Input voltage range⁽²⁾
V_O
Output voltage range⁽²⁾
I_IK
Input clamp current
I_OK
Output clamp current
I_O
Continuous output current
Continuous current through each V_CC or GND
T_stg
Storage temperature range
V_I < 0
V_O < 0 or V_O > V_CC
V_O = 0 to V_CC
MIN
MAX UNIT
–0.5
7V
–0.5
7V
–0.5 V_CC + 0.5
V
–20 mA
±20 mA
±25 mA
±50 mA
–65
150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
7.2 ESD Ratings
V_(ESD) Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins⁽¹⁾
Charged device model (CDM), per JEDEC specification JESD22-C101,
all pins⁽²⁾
VALUE
2000
1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
UNIT
V
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)⁽¹⁾
V_CC
Supply voltage
V_IH
High-level input voltage
V_IL
Low-level input voltage
V_IH
Input voltage
V_O
Output voltage
I_OH
High-level output current
I_OL
Low-level output current
Δt/Δv
T_A
Input transition rise or fall rate
Operating free-air temperature
V_CC = 2 V
V_CC = 3 V
V_CC = 5.5 V
V_CC = 2 V
V_CC = 3 V
V_CC = 5.5 V
V_CC = 2 V
V_CC = 3.3 V ± 0.3 V
V_CC = 5 V ± 0.5 V
V_CC = 2 V
V_CC = 3.3 V ± 0.3 V
V_CC = 5 V ± 0.5 V
V_CC = 3.3 V ± 0.3 V
V_CC = 5 V ± 0.5 V
MIN
MAX UNIT
2
5.5
V
1.5
2.1
V
3.85
0.5
0.9
V
1.65
0
5.5
V
0
V_CC
V
–50
µA
–4
mA
–8
50
µA
4
mA
8
100
ns/V
20
–40
125
°C
(1) All unused inputs of the device must be held at V_CC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs (SCBA004).
4
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