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SN54ALS112A_15 Datasheet, PDF (4/17 Pages) Texas Instruments – DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
SN54ALS112A, SN74ALS112A
DUAL JĆK NEGATIVEĆEDGEĆTRIGGERED FLIPĆFLOPS
WITH CLEAR AND PRESET
SDAS199A − APRIL 1982 − REVISED DECEMBER 1994
switching characteristics (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500 Ω,
TA = MIN to MAX†
SN54ALS112A SN74ALS112A
MIN MAX MIN MAX
fmax
25
30
tPLH
tPHL
PRE or CLR
Q or Q
3
26
4
23
3
15
4
18
tPLH
CLK
Q or Q
3
23
3
15
tPHL
5
24
5
19
† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
UNIT
MHz
ns
ns
4
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