PCM3501_08 Datasheet, PDF (4/28 Pages) Texas Instruments – VOICE/MODEM CODEC

PIN CONFIGURATION
Top View
1 V_COM
2 V_REF1
3 V_REF2
4 V_IN+
5 V_IN–
6 M/S
PCM3501
V_CC 24
AGND 23
V_OUT+ 22
V_OUT– 21
PDWN 20
LOOP 19
7 TSC
HPFD 18
8 BCK
XTI 17
9 FS
XTO 16
10 DIN
SCKIO 15
11 DOUT
DGND 14
12 FSO
V_DD 13
SSOP
PIN ASSIGNMENTS
PIN NAME I/O DESCRIPTION
1
V_COM OUT Common-Mode Voltage (0.5V_CC). This pin should be connected to ground through a capacitor.
2
V_REF1
— Decouple Pin for Reference Voltage 1 (0.99V_CC). This pin should be connected to ground through a capacitor.
3
V_REF2
— Decouple Pin for Reference Voltage 2 (0.2V_CC). This pin should be connected to ground through a capacitor.
4
V_IN+
IN Non-Inverting input to on-chip AFE.
5
V_IN–
IN Inverting input to on-chip AFE.
6
M/S
IN Master/Slave Select. This pin is used to determine the operating mode for the serial interface. A logic ‘0’ on this pin selects the Slave
Mode. A logic ‘1’ on this pin selects the Master Mode.⁽²⁾
7
TSC
IN Time Slot Mode Control. This pin is used to select the time slot operating mode. A logic ‘0’ on this pin disables Time Slot Mode. A
logic ‘1’ on this pin enables Time Slot Mode.⁽²⁾
8
BCK
I/O Bit Clock. This pin serves as the bit (or shift) clock for the serial interface. This pin is an input in Slave Mode and an output in Master
Mode.⁽¹⁾
9
FS
I/O Frame Sync. This pin serves as the frame synchronization clock for the serial interface. This pin is an input in Slave Mode and an
output in Master Mode.⁽¹⁾
10
DIN
IN Serial Data Input. This pin is used to write 16-bit data to the DAC.⁽¹⁾
11 DOUT OUT Serial Data Output. The ADC outputs 16-bit data on this pin.⁽³⁾
12
FSO OUT Frame Sync Output. Active only when Time Slot Mode is enabled. This pin is set to a high impedance state when Time Slot mode
is disabled (TSC = 0).
13
V_DD
— Digital Power Supply. Used to power the digital section of the ADC and DAC, as well as the serial interface and mode control logic.
This pin is not internally connected to V_CC.
14 DGND — Digital Ground. Internally connected through the substrate to analog ground.
15 SCKIO I/O System Clock Input/Output. This pin is a system clock output when using the crystal oscillator or XTI as the system clock input; when
XTI is connected to ground, this pin is a system clock input.⁽¹⁾
16
XTO OUT Crystal Oscillator Output.
17
XTI
IN Crystal Oscillator Input or an External System Clock Input.
18 HPFD IN High-Pass Filter Disable. When this pin is set to a logic ‘1’, the HPF function in the ADC is disabled.⁽²⁾
19 LOOP IN ADC-to-DAC Loop-Back Control. When this pin is set to logic ‘1’, the ADC data is fed to the DAC input.⁽²⁾
20 PDWN IN Power Down and Reset Control. When this pin is logic ‘0’, Power-Down Mode is enabled. The PCM3500 is reset on the rising edge
of this signal.⁽²⁾
21 V_OUT– OUT Inverting output.
22 V_OUT+ OUT Non-inverting output.
23 AGND — Analog Ground. This is the ground for the internal analog circuitry.
24
V_CC
— Analog Power Supply. Used to power the analog circuitry of the ADC and DAC.
NOTES: (1) Schmitt-Trigger input. (2) Schmitt-Trigger input with an internal pull-down resistor. (3) Tri-state output in Time Slot Mode.
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PCM3501
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