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| LP38693SD-ADJ Datasheet, PDF (4/22 Pages) Texas Instruments – LP38693-ADJ 500mA Low Dropout CMOS Linear Regulators with Adjustable Output Stable with Ceramic Output Capacitors | |||
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LP38691-ADJ, LP38693-ADJ
SNVS324I â JANUARY 2005 â REVISED APRIL 2013
www.ti.com
Electrical Characteristics (continued)
Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range.
Unless otherwise specified: VIN = VOUT + 1V, CIN = COUT = 10 µF, ILOAD = 10mA. Min/Max limits are specified through testing,
statistical correlation, or design.
Symbol
Parameter
Conditions
Min
Typ (1)
Max
Units
IFB
PSRR
Foldback Current Limit
Ripple Rejection
VIN - VO > 5V
VIN - VO < 4V
VIN = VO + 2V(DC), with 1V(p-p) /
120Hz Ripple
350
mA
850
55
dB
TSD
TSD (HYST)
Thermal Shutdown Activation
(Junction Temp)
Thermal Shutdown Hysteresis
(Junction Temp)
160
°C
10
IADJ
en
VO (LEAK)
VEN
IEN
ADJ Input Leakage Current
VADJ = 0 - 1.5V
VIN = 10V
Output Noise
BW = 10Hz to 10kHz
VO = 3.3V
Output Leakage Current
VO = VO(NOM) + 1V @ VIN = 10V
Enable Voltage (LP38693-ADJ Only) Output = OFF
Enable Pin Leakage (LP38693-ADJ
Only)
Output = ON, VIN = 4V
Output = ON, VIN = 6V
Output = ON, VIN = 10V
VEN = 0V or 10V, VIN = 10V
-100
1.8
3.0
4.0
-1
0.01
0.7
0.5
0.001
100
nA
µV/âHz
2
µA
0.4
V
1
µA
Block Diagrams
VIN
P-FET
-
N/C
ENABLE
LOGIC
+
THERMAL
SHUTDOWN
1.25V
REFERENCE
MOSFET
DRIVER
FOLDBACK
CURRENT
LIMITING
P-FET
VOUT
ADJ
GND
Figure 4. LP38691-ADJ Functional Diagram (WSON)
4
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Copyright © 2005â2013, Texas Instruments Incorporated
Product Folder Links: LP38691-ADJ LP38693-ADJ
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