LMP91050_15 Datasheet, PDF (4/28 Pages) Texas Instruments – Configurable AFE for Nondispersive Infrared (NDIR) Sensing Applications

LMP91050
SNAS517E – NOVEMBER 2011 – REVISED SEPTEMBER 2015
www.ti.com
7.2 ESD Ratings
V_(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾
Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾
Machine Model
VALUE
±2500
±1250
±250
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
UNIT
V
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)⁽¹⁾
Supply Voltage
Junction Temperature⁽²⁾
MIN
MAX
UNIT
2.7
5.5
V
–40
105
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The maximum power dissipation is a function of T_J(MAX), θ_JA, and the ambient temperature, TA. The maximum allowable power
dissipation at any ambient temperature is P_DMAX = (T_J(MAX) - T_A)/ θ_JA All numbers apply for packages soldered directly onto a PC board.
7.4 Thermal Information
THERMAL METRIC⁽¹⁾
LMP91050
DGS (VSSOP)
UNIT
10 PINS
R_θJA
Junction-to-ambient thermal resistance
176
°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
7.5 Electrical Characteristics
The following specifications apply for VDD = 3.3 V, VCM = 1.15 V, unless otherwise specified. All other limits apply to T_A = T_J
= +25°C.⁽¹⁾
PARAMETER
TEST CONDITIONS
MIN ⁽²⁾
TYP ⁽³⁾
MAX⁽²⁾ UNIT
POWER SUPPLY
VDD
Supply voltage
2.7
3.3
5.5
V
IDD
Supply current
All analog block ON
3.1
3.7
4.2 mA
Power-down supply current All analog block OFF
45
85
121
μA
OFFSET CANCELLATION (OFFSET DAC)
Resolution
256
steps
LSB
All gains
33.8
mV
DNL
-1
2 LSB
Error
Output referred offset error, all gains
±100
mV
Offset adjust range
Output referred, all gains
0.2
VDD – 0.2
V
DAC settling time
480
μs
PROGRAMMABLE GAIN AMPLIFIER (PGA) 1ST STAGE, R_L = 10 kΩ, C_L = 15 pF
5
IBIAS
Bias current
T_A = –40°C to +85°C
200
pA
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that T_J = T_A. No ensured specification of parametric performance is indicated in the electrical
tables under conditions of internal self-heating where T_J > T_A. Absolute Maximum Ratings indicate junction temperature limits beyond
which the device may be permanently degraded, either mechanically or electrically.
(2) Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlations using
statistical quality control (SQC) method.
(3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped
production material.
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