English
Language : 

DRV8829 Datasheet, PDF (4/17 Pages) Texas Instruments – H-BRIDGE MOTOR DRIVER IC
DRV8829
SLVSA74B – MAY 2010 – REVISED MAY 2011
www.ti.com
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1) (2)
VALUE
UNIT
VM
Power supply voltage range
–0.3 to 47
V
Digital pin voltage range
–0.5 to 7
V
VREF Input voltage
–0.3 to 4
V
ISENSE pin voltage
–0.3 to 0.8
V
Peak motor drive output current, t < 1 μS
Continuous motor drive output current(3)
Internally limited
A
5
A
Continuous total power dissipation
See Dissipation Ratings table
TJ
Operating virtual junction temperature range
TA
Operating ambient temperature range
Tstg
Storage temperature range
–40 to 150
°C
–40 to 85
°C
–60 to 150
°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(3) Power dissipation and thermal limits must be observed.
THERMAL INFORMATION
THERMAL METRIC(1)
DRV8829
PWP
UNITS
θJA
θJCtop
θJB
ψJT
ψJB
θJCbot
Junction-to-ambient thermal resistance(2)
Junction-to-case (top) thermal resistance(3)
Junction-to-board thermal resistance(4)
Junction-to-top characterization parameter(5)
Junction-to-board characterization parameter(6)
Junction-to-case (bottom) thermal resistance(7)
28 PINS
31.6
15.9
5.6
0.2
5.5
1.4
°C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific
JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7).
(7) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
VM
VREF
IV3P3
fPWM
Motor power supply voltage range(1)
VREF input voltage(2)
V3P3OUT load current
Externally applied PWM frequency
(1) All VM pins must be connected to the same supply voltage.
(2) Operational at VREF between 0 V and 1 V, but accuracy is degraded.
MIN
NOM
MAX UNIT
8.2
45
V
1
3.5
V
0
1
mA
0
100
kHz
4
Copyright © 2010–2011, Texas Instruments Incorporated