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CDC3RL02YFPR Datasheet, PDF (4/15 Pages) Texas Instruments – LOW PHASE-NOISE TWO-CHANNEL CLOCK FAN-OUT BUFFER
CDC3RL02
SCHS371 – NOVEMBER 2009
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
LDO
VOUT
CLDO
IOUT(SC)
I0UT(PK)
LDO output voltage
External load capacitance
Short circuit output current
Peak output current
PSR
Power supply rejection
tsu
LDO startup time
Power Consumption
IOUT = 50 mA
RL = 0 Ω
VBATT = 2.3 V, VLDO = VOUT – 5%
VBATT = 2.3V, IOUT = 2 mA,
fIN = 217 Hz and
1 kHz
fIN = 3.25 MHz
VBATT = 2.3 V , CLDO = 1 μF, CLK_REQ_n to
VLDO = 1.71 V
VBATT = 5.5 V , CLDO = 10 μF, CLK_REQ_n to
VLDO = 1.71 V
ISB
Standby current
Device in standby (all VCLK_REQ_n = 0 V)
ICCS
Static current consumption
Device active but not switching
IOB
Output buffer average current fIN = 26 MHz, CLOAD = 50 pF
CPD
Output power dissipation
capacitance
fIN = 26 MHz
MCLK_IN Input
II
MCLK_IN, CLK_REQ_1/2
leakage current
VI = VLDO or GND
CI
MCLK_IN capacitance
RI
MCLK_IN impedance
fIN
MCLK_IN frequency range
MCLK_IN LVCMOS Source
fIN = 26 MHz
fIN = 26 MHz
1-kHz offset
Additive phase noise
fIN = 26 MHz, tr/tf ≤ 1 ns
10-kHz offset
100-kHz offset
1-MHz offset
Additive jitter
fIN = 26 MHz, VPP = 0.8 V, BW = 10–5 MHz
tDL
MCLK_IN to CLK_OUT_n
propagation delay
DCL
Output duty cycle
fIN = 26 MHz, DCIN = 50%
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MIN
TYP
MAX UNIT
1.71
1.8
1.89 V
1
10 μF
100
mA
100 mA
60
dB
40
0.2
ms
1
0.2
1 μA
0.4
1 mA
4.2
mA
44 pF
4.75
6
10
26
–140
–149
–153
–148
0.37
11
45
50
1 μA
pF
kΩ
52 MHz
dBc/Hz
ps (rms)
ns
55 %
4
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