English
Language : 

ADS58B18_14 Datasheet, PDF (4/70 Pages) Texas Instruments – 11-Bit, 200MSPS/9-Bit, 250MSPS Ultralow-Power ADCs with Analog Buffer
ADS58B18
ADS58B19
SBAS487D – NOVEMBER 2009 – REVISED JANUARY 2011
www.ti.com
ELECTRICAL CHARACTERISTICS: ADS58B18/ADS58B19
Typical values are at +25°C, AVDD = 1.8V, AVDD_BUF = 3.3V, DRVDD = 1.8V, 50% clock duty cycle, –1dBFS differential
analog input, and DDR LVDS interface, unless otherwise noted. Minimum and maximum values are across the full
temperature range:
TMIN = –40°C to TMAX = +85°C, AVDD = 1.8V, and DRVDD = 1.8V.
ADS58B18
ADS58B19
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
Resolution
11
9
Bits
SNR (signal-to-noise ratio), LVDS
SINAD (signal-to-noise and distortion ratio),
LVDS
Spurious-free dynamic range
SFDR
Total harmonic distortion
THD
Second-harmonic distortion
HD2
Third-harmonic distortion
HD3
Worst spur
(other than second and third harmonics)
Two-tone intermodulation
distortion
IMD
fIN = 10MHz
fIN = 70MHz
fIN = 100MHz
fIN = 170MHz
fIN = 300MHz
fIN = 10MHz
fIN = 70MHz
fIN = 100MHz
fIN = 170MHz
fIN = 300MHz
fIN = 10MHz
fIN = 70MHz
fIN = 100MHz
fIN = 170MHz
fIN = 300MHz
fIN = 10MHz
fIN = 70MHz
fIN = 100MHz
fIN = 170MHz
fIN = 300MHz
fIN = 10MHz
fIN = 70MHz
fIN = 100MHz
fIN = 170MHz
fIN = 300MHz
fIN = 10MHz
fIN = 70MHz
fIN = 100MHz
fIN = 170MHz
fIN = 300MHz
fIN = 10MHz
fIN = 70MHz
fIN = 100MHz
fIN = 170MHz
fIN = 300MHz
f1 = 185MHz, f2 = 190MHz,
each tone at –7dBFS
64.5
64
71
70
71
76
76
66.3
66.2
66.1
66
65.3
66.2
66.1
66
65.8
64.8
87.5
87
87
81
75
86.5
85
84
81
74.5
90
91
92
87
79
87.5
87
87
81
75
91
91
90
89
88
–86
55.8
55.8
55.8
54.7
55.8
55.8
55.8
55.8
55.8
54.2
55.8
55.7
76.5
76.2
76.1
68.5
76
75.7
85
80
79
67.5
80.5
71.5
88
89
85
68.5
85
75
89
90
82
68.5
85
75
76.5
76.2
76.1
68.5
76
76
–86
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBFS
Input overload recovery
Recovery to within 1% (of final
value) for 6dB overload with
1
sine-wave input
1
Clock
cycles
AC power-supply rejection ratio
PSRR
For 100mVPP signal on AVDD
supply, up to 10MHz
> 30
> 30
dB
Effective number of bits
Differential nonlinearity
Integral nonlinearity
ENOB
DNL
INL
fIN = 170MHz
fIN = 170MHz
fIN = 170MHz
10.6
–0.7
±0.25
2
±0.5
±2.5
9
LSBs
–0.6
±0.15
0.85
LSBs
±0.25
±1.2
LSBs
4
Submit Documentation Feedback
© 2009–2011, Texas Instruments Incorporated
Product Folder Link(s): ADS58B18 ADS58B19