ADC08D1500 Datasheet, PDF (4/54 Pages) National Semiconductor (TI) – High Performance, Low Power, Dual 8-Bit, 1.5 GSPS A/D Converter

ADC08D1500
SNAS316G – JUNE 2005 – REVISED APRIL 2013
Pin Descriptions and Equivalent Circuits
Pin Functions
Pin No.
Symbol
Equivalent Circuit
V_A
50k
3
OutV / SCLK
GND
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Description
Output Voltage Amplitude and Serial Interface Clock. Tie this pin
high for normal differential DCLK and data amplitude. Ground this
pin for a reduced differential output amplitude and reduced power
consumption. See The LVDS Outputs. When the extended control
mode is enabled, this pin functions as the SCLK input which clocks
in the serial data. See NORMAL/EXTENDED CONTROL for details
on the extended control mode. See THE SERIAL INTERFACE for
description of the serial interface.
4
OutEdge / DDR /
SDATA
V_A
50k
200k
50k 8 pF
GND
DDR
SDATA
DCLK Edge Select, Double Data Rate Enable and Serial Data
Input. This input sets the output edge of DCLK+ at which the output
data transitions. (See OutEdge Setting). When this pin is floating or
connected to 1/2 the supply voltage, DDR clocking is enabled.
When the extended control mode is enabled, this pin functions as
the SDATA input. See NORMAL/EXTENDED CONTROL for details
on the extended control mode. See THE SERIAL INTERFACE for
description of the serial interface.
15
DCLK_RST
26
PD
30
CAL
29
PDQ
V_A
V_A
GND
V_A
50 k:
DCLK Reset. A positive pulse on this pin is used to reset and
synchronize the DCLK outs of multiple converters. See MULTIPLE
ADC SYNCHRONIZATION for detailed description.
Power Down Pins. A logic high on the PD pin puts the entire device
into the Power Down Mode.
Calibration Cycle Initiate. A minimum 80 input clock cycles logic low
followed by a minimum of 80 input clock cycles high on this pin
initiates the self calibration sequence. See Self Calibration for an
overview of self-calibration and On-Command Calibration for a
description of on-command calibration.
A logic high on the PDQ pin puts only the "Q" ADC into the Power
Down mode.
GND
14
FSR/ECE
V_A
50k
200k
50k 8 pF
GND
Full Scale Range Select and Extended Control Enable. In non-
extended control mode, a logic low on this pin sets the full-scale
differential input range to 650 mV_P-P. A logic high on this pin sets
the full-scale differential input range to 870 mV_P-P. See The Analog
Inputs. To enable the extended control mode, whereby the serial
interface and control registers are employed, allow this pin to float
or connect it to a voltage equal to V_A/2. See NORMAL/EXTENDED
CONTROL for information on the extended control mode.
4
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