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9314_11 Datasheet, PDF (4/8 Pages) Texas Instruments – Quad Latch
Switching Characteristics VCC e a5 0V TA e a25 C (See Section 1 for waveforms and load configurations)
Symbol
Parameter
CL e 15 pF
Min
Max
Units
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
Propagation Delay
E to Qn
Propagation Delay
Dn to Qn
Propagation Delay
MR to Qn
Propagation Delay
Sn to Qn
24
24
ns
12
ns
24
18
ns
24
ns
Functional Description
The ’9314 consists of four latches with a common active
LOW Enable input and active LOW Master Reset input
When the Enable goes HIGH data present in the latches is
stored and the state of the latch is no longer affected by the
Sn and Dn inputs The Master Reset when activated over-
rides all other input conditions forcing all latch outputs LOW
Each of the four latches can be operated in one of two
modes
D-TYPE LATCH For D-type operation the S input of a latch
is held LOW While the common Enable is active the latch
output follows the D input Information present at the latch
output is stored in the latch when the Enable goes HIGH
SET RESET LATCH During set reset operation when the
common Enable is LOW a latch is reset by a LOW on the D
input and can be set by a LOW on the S input if the D input
is HIGH If both S and D inputs are LOW the D input will
dominate and the latch will be reset When the Enable goes
HIGH the latch remains in the last state prior to disable-
ment The two modes of latch operation are shown in the
Truth Table
Truth Table
MR
E
D
S
H
L
L
L
H
L
H
L
H
H
X
X
H
L
L
L
H
L
H
L
H
L
L
H
H
L
H
H
H
H
X
X
L
X
X
X
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
Qnb1 e Previous Output State
Qn e Present Output State
Qn
L
H
Qnb1
L
H
L
Qnb1
Qnb1
L
Operation
D Mode
R S Mode
Reset
3