LM3S5K31 Datasheet, PDF (394/1121 Pages) Texas Instruments – Stellaris® LM3S5K31 Microcontroller

Micro Direct Memory Access (μDMA)
Register 16: DMA Channel Primary Alternate Set (DMAALTSET), offset 0x030
Each bit of the DMAALTSET register represents the corresponding µDMA channel. Setting a bit
configures the µDMA channel to use the alternate control data structure. Reading the register returns
the status of which control data structure is in use for the corresponding µDMA channel.
DMA Channel Primary Alternate Set (DMAALTSET)
Base 0x400F.F000
Offset 0x030
Type R/W, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
SET[n]
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
SET[n]
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:0
Name
SET[n]
Type
Reset Description
R/W 0x0000.0000 Channel [n] Alternate Set
Value Description
0 µDMA channel [n] is using the primary control structure.
1 µDMA channel [n] is using the alternate control structure.
Bit 0 corresponds to channel 0. A bit can only be cleared by setting the
corresponding CLR[n] bit in the DMAALTCLR register.
Note:
For Ping-Pong and Scatter-Gather cycle types, the µDMA
controller automatically sets these bits to select the alternate
channel control data structure.
394
January 20, 2012
Texas Instruments-Production Data