LM3S1538_16 Datasheet, PDF (390/642 Pages) Texas Instruments – Stellaris LM3S1538 Microcontroller

Analog-to-Digital Converter (ADC)
Table 11-2. ADC Signals (108BGA) (continued)
Pin Name
Pin Number Pin Type Buffer Type^a Description
ADC1
A1
I
Analog Analog-to-digital converter input 1.
ADC2
B3
I
Analog Analog-to-digital converter input 2.
ADC3
B2
I
Analog Analog-to-digital converter input 3.
ADC4
A2
I
Analog Analog-to-digital converter input 4.
ADC5
A3
I
Analog Analog-to-digital converter input 5.
ADC6
B4
I
Analog Analog-to-digital converter input 6.
ADC7
A4
I
Analog Analog-to-digital converter input 7.
a. The TTL designation indicates the pin has TTL-compatible voltage levels.
11.3 Functional Description
The Stellaris ADC collects sample data by using a programmable sequence-based approach instead
of the traditional single or double-sampling approaches found on many ADC modules. Each sample
sequence is a fully programmed series of consecutive (back-to-back) samples, allowing the ADC
to collect data from multiple input sources without having to be re-configured or serviced by the
controller. The programming of each sample in the sample sequence includes parameters such as
the input source and mode (differential versus single-ended input), interrupt generation on sample
completion, and the indicator for the last sample in the sequence.
11.3.1
Sample Sequencers
The sampling control and data capture is handled by the sample sequencers. All of the sequencers
are identical in implementation except for the number of samples that can be captured and the depth
of the FIFO. Table 11-3 on page 390 shows the maximum number of samples that each sequencer
can capture and its corresponding FIFO depth. In this implementation, each FIFO entry is a 32-bit
word, with the lower 10 bits containing the conversion result.
Table 11-3. Samples and FIFO Depth of Sequencers
Sequencer
SS3
SS2
SS1
SS0
Number of Samples
1
4
4
8
Depth of FIFO
1
4
4
8
For a given sample sequence, each sample is defined by two 4-bit nibbles in the ADC Sample
Sequence Input Multiplexer Select (ADCSSMUXn) and ADC Sample Sequence Control
(ADCSSCTLn) registers, where "n" corresponds to the sequence number. The ADCSSMUXn
nibbles select the input pin, while the ADCSSCTLn nibbles contain the sample control bits
corresponding to parameters such as temperature sensor selection, interrupt enable, end of
sequence, and differential input mode. Sample sequencers are enabled by setting the respective
ASENn bit in the ADC Active Sample Sequencer (ADCACTSS) register, and should be configured
before being enabled.
When configuring a sample sequence, multiple uses of the same input pin within the same sequence
is allowed. In the ADCSSCTLn register, the IEn bits can be set for any combination of samples,
allowing interrupts to be generated after every sample in the sequence if necessary. Also, the END
bit can be set at any point within a sample sequence. For example, if Sequencer 0 is used, the END
390
July 15, 2014
Texas Instruments-Production Data