MSP430F15X_14 Datasheet, PDF (39/78 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F15x, MSP430F16x, MSP430F161x
MIXED SIGNAL MICROCONTROLLER
SLAS368G − OCTOBER 2002 − REVISED MARCH 2011
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
12-bit ADC, power supply and input range conditions (see Note 1)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
AV_CC
V_(P6.x/Ax)
AV_CC and DV_CC are connected together
Analog supply voltage
AV_SS and DV_SS are connected together
2.2
V_(AVSS) = V_(DVSS) = 0 V
Analog input voltage
range (see Note 2)
All P6.0/A0 to P6.7/A7 terminals. Analog inputs
selected in ADC12MCTLx register and P6Sel.x=1
0 ≤ x ≤ 7; V_(AVSS) ≤ V_P6.x/Ax ≤ V_(AVCC)
0
3.6 V
V_AVCC
V
I_ADC12
Operating supply current
into AV_CC terminal
(see Note 3)
f_ADC12CLK = 5.0 MHz
ADC12ON = 1, REFON = 0
SHT0=0, SHT1=0, ADC12DIV=0
2.2 V
3V
0.65
1.3
mA
0.8
1.6
I_REF+
Operating supply current
into AV_CC terminal
(see Note 4)
f_ADC12CLK = 5.0 MHz
ADC12ON = 0,
REFON = 1, REF2_5V = 1
f_ADC12CLK = 5.0 MHz
ADC12ON = 0,
REFON = 1, REF2_5V = 0
3V
2.2 V
3V
0.5
0.8 mA
0.5
0.8
mA
0.5
0.8
C_I ^†
Input capacitance
Only one terminal can be selected
at one time, P6.x/Ax
2.2 V
40 pF
R_I†
Input MUX ON resistance 0V ≤ V_Ax ≤ V_AVCC
3V
2000 Ω
† _{Not production tested, limits verified by design}
NOTES: 1. The leakage current is defined in the leakage current table with P6.x/Ax parameter.
2. The analog input voltage range must be within the selected reference voltage range V_R+ to V_R− for valid conversion results.
3. The internal reference supply current is not included in current consumption parameter I_ADC12.
4. The internal reference current is supplied via terminal AV_CC. Consumption is independent of the ADC12ON control bit, unless a
conversion is active. The REFON bit enables to settle the built-in reference before starting an A/D conversion.
12-bit ADC, external reference (see Note 1)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
V_eREF+
Positive external
reference voltage input ^{VeREF+ > VREF−/VeREF− (see Note 2)}
1.4
V_AVCC
V
V_{REF− /}V_eREF−
Negative external
reference voltage input
V_eREF+ > V_REF−/V_eREF− (see Note 3)
0
1.2 V
(V_eREF+ −
V_REF−/V_eREF−)
Differential external
reference voltage input
V_eREF+ > V_REF−/V_eREF− (see Note 4)
1.4
V_AVCC
V
I_VeREF+
Static input current
0V ≤V_eREF+ ≤ V_AVCC
2.2 V/3 V
±1 μA
I_{VREF−/VeREF−}
Static input current
0V ≤ V_eREF− ≤ V_AVCC
2.2 V/3 V
±1 μA
NOTES:
1. The external reference is used during conversion to charge and discharge the capacitance array. The input capacitance, C_i, is also
the dynamic load for an external reference during conversion. The dynamic impedance of the reference supply should follow the
recommendations on analog-source impedance to allow the charge to settle for 12-bit accuracy.
2. The accuracy limits the minimum positive external reference voltage. Lower reference voltage levels may be applied with reduced
accuracy requirements.
3. The accuracy limits the maximum negative external reference voltage. Higher reference voltage levels may be applied with reduced
accuracy requirements.
4. The accuracy limits minimum external differential reference voltage. Lower differential reference voltage levels may be applied with
reduced accuracy requirements.
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