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AFE030 Datasheet, PDF (39/58 Pages) Texas Instruments – Powerline Communications Analog Front-End | |||
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AFE030
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Reset Register <7:0>
BIT NAME
LOCATION
(0 = LSB)
--
0
--
1
SOFTRST0,
SOFTRST1,
SOFTRST2
2, 3, 4
T_FLAG
5
I_FLAG
6
â
7
DieID Register <7:0>
BIT NAME
LOCATION
(0 = LSB)
DIE ID<0>
0
DIE ID<1>
1
DIE ID<2>
2
DIE ID<3>
3
DIE ID<4>
4
DIE ID<5>
5
DIE ID<6>
6
DIE ID<7>
7
Revision Register <7:0>
BIT NAME
LOCATION
(0 = LSB)
REVISION ID<0>
0
REVISION ID<1>
1
REVISION ID<2>
2
REVISION ID<3>
3
REVISION ID<4>
4
REVISION ID<5>
5
REVISION ID<6>
6
REVISION ID<7>
7
SBOS588A â DECEMBER 2011 â REVISED DECEMBER 2011
Table 14. RESET Register: Address 09h
Default: 00h
DEFAULT
0
0
0, 0, 0
0
0
0
R/W
FUNCTION
--
Reserved
--
Reserved
These bits are used to perform a software reset of the ENABLE1,
W
ENABLE2, CONTROL2, CONTROL3, and GAIN SELECT
registers. Writing '101' to these registers performs a software reset.
This bit is used to indicate the status of a PA thermal overload.
0 = On read, indicates that no thermal overload has occurred since
R/W
the last reset.
0 = On write, resets this bit.
1 = On read, indicates that a thermal overload has occurred since
the last reset. Remains latched until reset.
This bit is used to indicate the status of a PA output current
overload.
0 = On read indicates that no current overload has occurred since
R/W
the last reset.
0 = On write, resets this bit.
1 = On read indicates that a current overload has occurred since
the last reset. Remains latched until reset.
â
Reserved
Table 15. DieID Register: Address 0Ah
Default: 01h
DEFAULT
1
0
0
0
0
0
0
0
R/W
FUNCTION
R
The DieID Register is hard-wired.
R
The DieID Register is hard-wired.
R
The DieID Register is hard-wired.
R
The DieID Register is hard-wired.
R
The DieID Register is hard-wired.
R
The DieID Register is hard-wired.
R
The DieID Register is hard-wired.
R
The DieID Register is hard-wired.
Table 16. Revision Register: Address 0Bh
Default: 02h
DEFAULT
0
1
0
0
0
0
0
0
R/W
FUNCTION
R
The Revision Register is hard-wired.
R
The Revision Register is hard-wired.
R
The Revision Register is hard-wired.
R
The Revision Register is hard-wired.
R
The Revision Register is hard-wired.
R
The Revision Register is hard-wired.
R
The Revision Register is hard-wired.
R
The Revision Register is hard-wired.
Copyright © 2011, Texas Instruments Incorporated
39
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