UCD9090-Q1 Datasheet, PDF (38/48 Pages) Texas Instruments – 10-Rail Power-Supply Sequencer and Monitor With ACPI Support

UCD9090-Q1
SLVSBH9A – JANUARY 2013 – REVISED FEBRUARY 2013
www.ti.com
Off-Board Configuration
On-Board Configuration
Table 11. Configuration Options
Data Flash via JTAG
Data Flash via I²C
Data flash export (.svf type file)
Data flash export (.srec or hex
type file)
Dedicated programmer
Fusion tools (with exclusive bus
access via USB to I²C adapter)
Data flash export
IC
Fusion tools (with exclusive bus
access via USB to I²C adapter)
PMBus Commands via I²C
Project file I²C/PMBus script
Fusion tools (with exclusive bus
access via USB to I²C adapter)
Fusion tools (with exclusive bus
access via USB to I²C adapter)
The advantages of off-board configuration include:
• Does not require access to device I²C bus on board
• Once soldered on board, full board power is available without further configuration.
• Can be partially reconfigured once the device is mounted.
Full Configuration Update While in Normal Mode
Although TI recommends performing a full configuration of the UCD9090-Q1 in a controlled test setup, there may
be times which required updating the configuration while the device is in an operating system. Updating the full
configuration based on methods listed in DEVICE CONFIGURATION AND PROGRAMMING section while the
device is in an operating system can be challenging, because these methods do not permit the UCD9090-Q1 to
operate as required by application during the programming. During described methods, the GPIOs may not be in
the desired states ,which can disable rails that provide power to the UCD9090-Q1. To overcome this, the
UCD9090-Q1 has the capability to allow full configuration update while still operating in normal mode.
Updating the full configuration while in normal mode consists of disabling data-flash write protection, erasing the
data flash, writing the data-flash image, and resetting the device. There is not a requirement to reset the device
immediately, but note that the UCD9090-Q1 continues to operate based on the previous configuration with fault
logging disabled until reset. See Configuration Programming of UCD Devices, available from the Documentation
& Help Center that is selectable from the Fusion GUI Help menu, for details.
JTAG INTERFACE
One can use the JTAG port for production programming, and also use four of the six JTAG pins as GPIOs during
normal operation. See the Pin Functions table at the beginning of the document and Table 4 for a list of the
JTAG signals and the names of those which can be used as GPIOs. The JTAG port is compatible with the IEEE
Standard 1149.1-1990, IEEE Standard Test-Access Port and Boundary Scan Architecture specification. This
device does not support boundary scan. The UCD9090-Q1 runs at 10% slower frequency while the JTAG is
enabled to ensure best JTAG operation.
The JTAG interface can provide an alternate interface for programming the device. Being disabled by default
allows enabling the GPIO pins with which JTAG is multiplexed. There are two conditions which enable the JTAG
interface:
• On power-up, if the data flash is blank. This condition allows JTAG to be used for writing the configuration
parameters to a programmed device with no PMBus interaction.
• When address 126 (0x7E) is detected at power up. A short to ground or an open condition on either address
pin generates address 126 (0x7E), which enables JTAG mode.
The UCD9090-Q1 system clock runs at 90% of nominal speed while in JTAG mode. For this reason, it is
important not to leave the UCD9090-Q1 in JTAG mode for normal application operation.
The Fusion GUI can create SVF files (See theDEVICE CONFIGURATION AND PROGRAMMING section) based
on a given data flash configuration, and which one can used to program the desired configuration by JTAG. For a
Boundary Scan Description Language (BSDL) file that supports the UCD9090-Q1, see the product folder in
www.ti.com.
There are many JTAG programmers in the market, and they all do not function the same. If planning to use
JTAG to configure the device, confirm that the available JTAG tools can reliably configure the device before
committing to a programming solution.
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