DAC5688_14 Datasheet, PDF (38/57 Pages) Texas Instruments – DUAL-CHANNEL, 16-BIT, 800 MSPS, 2x–8x INTERPOLATING DIGITAL-TO-ANALOG CONVERTER (DAC)

DAC5688
SLLS880C – DECEMBER 2007 – REVISED AUGUST 2010
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CLKO_CLK1 and LOCK_CLK1C Pins
Figure 41 shows the functionality of the CLKO_CLK1 and LOCK_CLK1C pins. Refer to Table 5. The controls for
these pins are found in the CONFIG2 register and are used in selection of device clocking mode. In single-ended
mode (CONFIG2 diffclk_ena = ‘0’) refer to Figure 43, both CLKO_CLK1 and LOCK_CLK1C pins have an
internal pull-down resistor approximately equivalent to 100kΩ.
clk1_ in_ena
clko_SE_hold
EN
Internal CLKO
CLKO _ CLK 1
LOCK _ CLK 1 C
0
EN
1
Internal CLK 1
EN
Internal LOCK
clk1c _in_ ena
diffclk _ ena
Figure 41. CLKO_CLK1 and LOCK_CLK1C pins bi-directional control
In differential mode (CONFIG2 diffclk_ena = ‘1’) the CLKO_CLK1 and LOCK_CLK1C input pins are configured
as a differential CLK1/C clock input. Refer Figure 39 for the equivalent circuit.
IOVDD
IOVDD
CLKO _ CLK 1
LOCK _ CLK 1 C
10 KW
IOVDD
10 KW
IOVDD
GND
GND _{10 KW}
10 KW
Note: Input common mode level is
approximately 0.5* IOVDD or 1.65 V.
GND
GND
Figure 42. CLKO_CLK1 and LOCK_CLK1C Differential Input Mode Equivalent Circuit
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