TPS659037_17 Datasheet, PDF (37/99 Pages) Texas Instruments – Power Management Unit (PMU) for Processor

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TPS659037
SLIS165E – DECEMBER 2014 – REVISED JULY 2017
Use Equation 1 as the basic equation for the SMPS output current result.
I_L
K
u
I_FS
u
GPADC
(2¹² 1)
code
I_OS
where
• K is the number of active SMPS phases
• I_FS = I_FS0 × K
• I_OS = I_OS0 × K
(1)
Use Equation 2 to calculate the temperature compensated result.
I_L
I_FS u GPADC code
[2¹² 1] u [1 TC_R0 u (Temperature 25)]
I_OS
(2)
For values of I_FS0 and I_OS0, see Section 4.12.
The SMPS thermal monitoring is enabled (default) and disabled with the SMPS_THERMAL_EN register.
When enabled, the SMPS thermal status is available in the SMPS_THERMAL_STATUS register. SMPS12
and SMPS3 have shared thermal protection, in effect, if SMPS12 triggers the thermal protection, then
SMPS3 operating in stand-alone mode is disabled. There is no dedicated thermal protection in SMPS8 or
SMPS9.
Each SMPS has a detection for load current above I_LIM, indicating overcurrent or shorted SMPS output. A
register SMPS_SHORT_STATUS indicates any SMPS short condition. Depending on the interrupt short
line mask bit register (INT2_MASK.SHORT), an interrupt is generated upon any shorted SMPS. If a short
situation occurs on any enabled SMPSs, the corresponding short status bit is set in the
SMPS_SHORT_STATUS register. A switch-off signal is then sent to the corresponding SMPS, and
remains off until the corresponding bit in the SMPS_SHORT_STATUS register is cleared. This register is
cleared on a read, or by issuing a POR. The time between a short detection and a SMPS switch-off is
approximately 155 µs to 185 µs. This same behavior applies to LDO shorts using the
LDO_SHORT_STATUS registers.
5.3.2.1.4 POWERGOOD
The external POWERGOOD pin indicates if the outputs of the SMPS are correct or not (Figure 5-3). Either
voltage and current monitoring or a current monitoring only can be selected for POWERGOOD indication.
This selection is common for all SMPSs in the
SMPS_POWERGOOD_MASK2.POWERGOOD_TYPE_SELECT bit register. When both voltage and
current are monitored, POWERGOOD signal active (polarity is programmable) indicates that all SMPS
outputs are within certain percentage, V_SMPSPG , of the programmed value and that load current is below
I_LIM.
All POWERGOOD sources can be masked in the SMPS_POWERGOOD_MASK1 and
SMPS_POWERGOOD_MASK2 registers. When an SMPS is disabled, it should be masked to prevent it
forcing POWERGOOD inactive. When SMPS voltage is transitioning from one target voltage to another
due to DVS command, voltage monitoring is internally masked and POWERGOOD is not impacted.
Including POWERGOOD in the GPADC result is possible for SMPS output current monitoring by setting
SMPS_COMPMODE = 1. Only one SMPS can be monitored by the GPADC channel at the time.
The POWERGOOD function can also be used for monitoring an external SMPS is at the correct output
level and the load is lower than the current limit; indication is through the GPIO_7 pin.
All POWERGOOD sources can be masked in SMPS_POWERGOOD_MASK1 and
SMPS_POWERGOOD_MASK2 registers.
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