DSD1796_14 Datasheet, PDF (37/61 Pages) Texas Instruments – 24BIT 192KHZ SAMPLING ADVANCED SEGMENT AUDIO STEREO DIGITAL TO ANALOG CONVERTER

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DSD1796
SLES101A – DECEMBER 2003 – REVISED NOVEMBER 2006
APPLICATION FOR DSD FORMAT (DSD MODE) INTERFACE
DSD Decoder
DATA_L
DATA_R
Bit Clock
System Clock ⁽¹⁾
DSD1796
1 DSDL
2 DSDR
3 DBCK
4 PLRCK
5 PDATA
6 PBCK
7 SCK
(1) _{The system clock can be removed after setting the register to the DSD mode.}
Figure 38. Connection Diagram in DSD Mode
Feature
This mode is used for interfacing directly to a DSD decoder, which is found in Super Audio CDt (SACD) applications.
The DSD mode is accessed by programming the following bit in the corresponding control register.
DSD = 1 (register 20)
The DSD mode provides a low-pass filtering function. The filtering is provided using an analog FIR filter structure. Four FIR
responses are available, and are selected by the DMF[1:0] bits of control register 18.
The DSD bit must be set before inputting DSD data; otherwise, the DSD1796 erroneously detects the TDMCA mode, and
commands are not accepted through the serial control interface.
Pin Assignment When Using the DSD Format Interface
Pins for DSD mode operation are:
D DSDL (pin 1): L-channel DSD data input
D DSDR (pin 2): R-channel DSD data input
D DBCK (pin 3): Bit clock for DSD data
Super Audio CD is a trademark of Sony Kabushiki Kaisha TA Sony Corporation, Japan.
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