DP83936AVUL-20_11 Datasheet, PDF (37/106 Pages) Texas Instruments – 32-bit non-multiplexed address and data bus

6 0 SONIC-T Registers (Continued)
RA^k5 0^l
15
0
0h Command Register
Status and Control Fields
1 Data Configuration Register
Control Fields
Status and
Control Registers
2 Receive Control Register
3 Transmit Control Register
Status and Control Fields
Status and Control Fields
Transmit
Registers
4 Interrupt Mask Register
$ ^{5 Interrupt Status Register}
Mask Fields
Status Fields
3F Data Configuration Register 2
Control Fields
6 Upper Transmit Descriptor Address Register Upper 16-bit Address Base
) _{7 Current Transmit Descriptor Address Register Lower 16-bit Address Offset}
0D Upper Receive Descriptor Address Register Upper 16-bit Address Base
0E Current Receive Descriptor Address Register Lower 16-bit Address Offset
14 Upper Receive Resource Address Register Upper 16-bit Address Base
Receive
Registers
15 Resource Start Address Register
16 Resource End Address Register
Lower 16-bit Address Offset
Lower 16-bit Address Offset
17 Resource Read Register
Lower 16-Bit Address Offset
$ 18 Resource Write Register
2B Receive Sequence Counter
Lower 16-bit Address Offset
Count Value
87
Count Value
CAM
Registers
Tally
Counters
Watchdog
Timer
21 CAM Entry Pointer
22 CAM Address Port 2
23 CAM Address Port 1
24 CAM Address Port 0
25 CAM Enable Register
26 CAM Descriptor Pointer
$ 27 CAM Descriptor Count
2C DRC Error Tally Counter
2D Frame Alignment Error Tally
) _{2E Missed Packet Tally}
29 Watchdog Timer 0
2A Watchdog Timer 1
28 Silicon Revision Register
4
Most Significant 16 bits of CAM Entry
Middle 16 bits of CAM Entry
Least Significant 16 bits of CAM Entry
Mask Fields
Lower 16-bit Address Offset
5
Count Value
Count Value
Count Value
Count Value
Lower 16-bit Count Value
Upper 16-bit Count Value
Chip Revision Number
FIGURE 6-3 SONIC-T Register Programming Model
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