TUSB544 Datasheet, PDF (36/60 Pages) Texas Instruments – USB TYPE-C 8.1 Gbps Multi-Protocol Linear Redriver

TUSB544
SLLSEZ0B – APRIL 2017 – REVISED MAY 2017
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7.6.1.8 DISPLAYPORT_5 Register (Offset = 1Bh) [reset = 0h]
DISPLAYPORT_5 is shown in Figure 29 and described in Table 20.
Return to Summary Table.
Figure 29. DISPLAYPORT_5 Register
7
6
5
4
3
2
1
0
I2C_RST
DPCD_RST
0h
0h
Table 20. DISPLAYPORT_5 Register Field Descriptions
Bit
Field
7-4
I2C_RST
3-0
DPCD_RST
Type
Reset
0h
0h
Description
Resets I2C registers to default values. This field is self- clearing.
Resets DPCD registers to default values. This field is self- clearing.
7.6.1.9 USB3.1_1 Register (Offset = 20h) [reset = 0h]
USB3.1 is shown in Figure 30 and described in Table 21.
Return to Summary Table.
Figure 30. USB3.1 Register
7
6
5
4
3
2
1
0
DTX2EQ_SEL
DRX2EQ_SEL
R/WU-0h
R/WU-0h
Bit
Field
7-4
DTX2EQ_SEL
3-0
DRX2EQ_SEL
Table 21. USB3.1 Register Field Descriptions
Type
Reset
Description
R/WU
0h
Field selects between 0 to 11 dB of EQ for DTX2P/N pins. When
EQ_OVERRIDE = 1’b0, this field reflects the sampled state of
DEQ[1:0] pins. When EQ_OVERRIDE = 1’b1, software can change
the EQ setting for DTX2P/N pins based on value written to this field.
R/WU
0h
Field selects between 0 to 11 dB of EQ for DRX2P/N pins. When
EQ_OVERRIDE = 1’b0, this field reflects the sampled state of
DEQ[1:0] pins. When EQ_OVERRIDE = 1’b1, software can change
the EQ setting for DRX2P/N pins based on value written to this field.
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