DIX9211 Datasheet, PDF (36/107 Pages) Texas Instruments – 216-kHz Digital Audio Interface Transceiver (DIX)

DIX9211
SBAS519 – SEPTEMBER 2010
www.ti.com
MPIO Description
Description for Signal Name Assigned to MPIO
Table 16 through Table 24 list the details of where each of the internal DIX9211 signals can be routed to. For
instance, DIR LOCK can be output to any of the MPIO and MPO pins, while SBCK (Secondary Clock Output)
can only be brought out through MPIO_A0.
SIGNAL NAME
CLKST
INT0
INT1
EMPH
BPSYNC
DTSCD
PARITY
LOCK
Table 16. DIR Flags Output
MPIO GROUP / PIN
All MPIOs, MPO0/1
All MPIOs, MPO0/1
All MPIOs, MPO0/1
All MPIOs, MPO0/1
All MPIOs, MPO0/1
All MPIOs, MPO0/1
All MPIOs, MPO0/1
All MPIOs, MPO0/1
DESCRIPTION
Clock transient status signal output
Interrupt system 0, Interrupt event detection output
Interrupt system 1, Interrupt event detection output
Channel status, emphasis detection output
Burst preamble sync signal output
DTS-CD/LD detection output
Biphase parity error detection output
PLL lock detection output
SIGNAL NAME
BFRAME
COUT
UOUT
VOUT
Table 17. DIR B Frame, Channel Status, User Data, Validity Flag Output
MPIO GROUP / PIN
All MPIOs, MPO0/1
All MPIOs
All MPIOs
All MPIOs
B frame output
Channel status data
User data
Validity flag
DESCRIPTION
SIGNAL NAME
SFSOUT0
SFSOUT1
SFSOUT2
SFSOUT3
SIGNAL NAME
RXIN8
RXIN9
RXIN10
RXIN11
Table 18. DIR Calculated Sampling Frequency Output
MPIO GROUP / PIN
All MPIOs
All MPIOs
All MPIOs
All MPIOs
Calculated f_S, decoded output, bit0
Calculated f_S, decoded output, bit1
Calculated f_S, decoded output, bit2
Calculated f_S, decoded output, bit3
DESCRIPTION
Table 19. Biphase Input
MPIO GROUP / PIN
MPIO_A0
MPIO_A1
MPIO_A2
MPIO_A3
Biphase signal input 8
Biphase signal input 9
Biphase signal input 10
Biphase signal input 11
DESCRIPTION
SIGNAL NAME
RECOUT0
RECOUT1
TXOUT
Table 20. Biphase Output
MPIO GROUP / PIN
MPO0/1
MPO0/1
MPO0/1
DESCRIPTION
Independent biphase selector 0, output0
Independent biphase selector 1, output1
Built-in DIT, biphase output
SIGNAL NAME
SBCK
SLRCK
XMCKO
Table 21. AUX Clocks Output
MPIO GROUP / PIN
MPIO_A0
MPIO_A1
MPIO_A2, MPO0/1
Secondary bit clock output
Secondary LR clock output
XTI pin input clock buffered output
DESCRIPTION
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