BQ76PL536A-Q1 Datasheet, PDF (36/55 Pages) Texas Instruments – 3 to 6 Series Cell Lithium-Ion Battery Monitor and Secondary Protection IC for EV and HEV Applications

bq76PL536A-Q1
SLUSAM3 – MAY 2011
REGISTER DETAILS
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DEVICE_STATUS REGISTER (0x00)
7
6
5
AR
FAULT
ALERT
4
3
2
–
ECC_COR
UVLO
1
CBT
0
DRDY
The STATUS register provides information about the current state of the bq76PL536A-Q1.
[7]
(ADDR_RQST)
This bit is written to indicate that the ADDR[0]…[5] bits have been written to the correct
address. This bit is a copy of in the ADDRESS_CONTROL[AR] bit.
0 = Address has not been assigned
1 = Address has been assigned
[6] (FAULT):
This bit indicates that this bq76PL536A-Q1 has detected a condition causing the FAULT
signal to become asserted.
0 = No FAULT exists
1 = A FAULT exists. Read FAULT_STATUS[] to determine the cause.
[5] (ALERT):
This bit indicates that this bq76PL536A-Q1v has detected a condition causing the ALERT
pin to become asserted.
0 = No FAULT exists
1 = An ALERT exists. Read ALERT_STATUS[] to determine the cause.
[4] (not implemented)
[3] (ECC_COR):
This bit indicates a one-bit error has been detected and corrected in the EPROM.
0 = No errors are detected in the EPROM
1 = A one-bit (single bit) error has been detected and corrected by on-chip logic.
[2] (UVLO):
This bit indicates the device VBAT has fallen below the undervoltage lockout trip point.
Some device operations are not valid in this condition.
0 = Normal operation
1 = UVLO trip point reached, device operation is not ensured.
[1] (CBT):
This bit indicates the cell balance timer is running.
0 = The cell balance timer is has not started or has expired.
1 = The cell balance timer is running.
[0] (DRDY):
This bit indicates the data is ready to read (no conversions active).
0 = There are conversion(s) running.
1 = There are no conversion(s) running.
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