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TPS2482_15 Datasheet, PDF (35/56 Pages) Texas Instruments – 36-V Hotswap Controller with Precision I2C Power Monitoring
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TPS2482
TPS2483
SLUSAW1 A – DECEMBER 2012 – REVISED MARCH 2013
ALERT PIN
The TPS2482 and TPS2483 have a single Alert Limit Register, 07h, that allows the ALERT pin to be
programmed to respond to a single user-defined event or to a conversion ready notification if desired. The
Mask/Enable Register allows the user to select from one of the five available functions to monitor and/or set the
conversion ready bit to control the response of the ALERT pin. Based on the function being monitored, the user
would then enter a value into the Alert Limit Register to set the corresponding threshold value that asserts the
ALERT pin.
The ALERT pin allows for one of several available Alert functions to be monitored to determine if a user-defined
threshold has been exceeded. The five Alert functions that can be monitored are:
• Shunt Voltage Over Limit (SOL)
• Shunt Voltage Under Limit (SUL)
• Bus Voltage Over Limit (BOL)
• Bus Voltage Under Limit (BUL)
• Power Over Limit (POL)
The ALERT pin is an open-drain output. This pin is asserted when the value of the Alert function selected in the
Mask/Enable Register exceeds the value programmed into the Alert Limit Register. Only one of these Alert
functions can be enabled and monitored at a time. If multiple Alert functions are enabled, the selected function in
the highest significant bit position takes priority and exclusively responds to the Alert Limit Register value. For
example, if the Shunt Voltage Over Limit and the Shunt Voltage Under Limit are both selected, the ALERT pin
asserts only when the Shunt Voltage Over Limit Register exceeds the value in the Alert Limit Register.
The Conversion Ready state of the device can also be monitored at the ALERT pin to inform the user when the
device has completed the previous conversion and is ready to begin a new conversion. Conversion Ready can
be monitored at the ALERT pin simultaneously with one of the Alert functions. If an Alert function and the
Conversion Ready are both enabled to be monitored at the ALERT pin, after the ALERT pin is asserted, the
Mask/Enable Register must be read following the Alert to determine the source of the Alert. By reading the
Conversion Ready Flag (CVRF), bit D3, and the Alert Function Flag (AFF), bit D4 in the Mask/Enable Register,
the source of the Alert can be determined. If the Conversion Ready feature is not desired and the CNVR bit is
not set, the ALERT pin only responds to an exceeded Alert limit based on the Alert function enabled.
If the Alert function is not used, the ALERT pin can be left floating without affecting the operation of the device.
Refer to Figure 39 to see the relative timing of when the value in the Alert Limit Register is compared to the
corresponding Alert function value. For example, if the Alert function that is enabled is Shunt Voltage Over Limit
(SOL), following every shunt voltage conversion the value in the Alert Limit Register is compared to the
measured shunt voltage to determine if the measurement has exceeded the programmed limit. The AFF, bit 4 of
the Mask/Enable Register, asserts high any time the measured voltage exceeds the value programmed into the
Alert Limit Register. In addition to the AFF being asserted, the ALERT pin logic polarity is asserted based on the
Alert Polarity Bit (APOL, bit 1 of the Mask/Enable Register). If the Alert Latch is enabled, the AFF and ALERT pin
remain asserted until either the Configuration Register is written to or the Mask/Enable Register is read.
The Shunt Voltage Alert functions compare the measured Shunt Voltage Register value to the Alert Limit
Register value following every shunt voltage conversion and assert the AFF bit and ALERT pin if the
programmed limit threshold is exceeded.
The Bus Voltage Alert functions compare the measured Bus Voltage Register value to the Alert Limit Register
value following every bus voltage conversion and assert the AFF bit and ALERT pin if the programmed limit
threshold is exceeded.
The Power Over Limit Alert function compares the calculated Power Register value to the Alert Limit Register
value following every bus voltage conversions and asserts the AFF bit and ALERT pin if the programmed limit
threshold is exceeded.
Copyright © 2012–2013, Texas Instruments Incorporated
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