LM3533_15 Datasheet, PDF (35/63 Pages) Texas Instruments – Complete Lighting Power Solution for Smartphone Handsets

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Bits [7:4]
Not used
LM3533
SNOSC68C – APRIL 2012 – REVISED SEPTEMBER 2015
Table 3. Output Configuration Register 2 (Address 0x11)
Bits [3:2]
LVLED5 Configuration
00 = LVLED5 is controlled by Control Bank C
01 = LVLED5 is controlled by Control Bank D
10 = LVLED5 is controlled by Control Bank E
11 = LVLED5 is controlled by Control Bank F (Default)
Bits [1:0]
LVLED4 Configuration
00 = LVLED4 is controlled by Control Bank C
01 = LVLED4 is controlled by Control Bank D
10 = LVLED4 is controlled by Control Bank E
11 = LVLED4 is controlled by Control Bank F
(Default)
Table 4. LED Current Start-Up/Shutdown Transition Time Register (Address 0x12)
Bits [7:6]
Not Used
Bits [5:3]
Startup Transition Time
Bits [2:0]
Shutdown Transition Time
000 = 2048µs (Default)
000 = 2048µs (Default)
001 = 262ms
001 = 262ms
010 = 524ms
010 = 524ms
011 = 1.049s
011 = 1.049s
100 =2.097s
100 =2.097s
101 = 4.194s
101 = 4.194s
110 = 8.389s
110 = 8.389s
111 = 16.78s
111 = 16.78s
Startup time is from when the device is enabled via I²C to Shutdown ramp time is from when the device is
when the initial target current is reached.
shutdown via I²C until the current sink ramps to 0.
Bits [7:6]
Not Used
Table 5. LED Current Run-Time Transition Time Register (Address 0x13)
Bits [5:3]
Transition Time Ramp Up
000 = 2048µs (Default)
001 = 262ms
010 = 524ms
011 = 1.049s
100 =2.097s
101 = 4.194s
110 = 8.389s
111 = 16.78s
Bits [2:0]
Transition Time Ramp Down
000 = 2048µs (Default)
001 = 262ms
010 = 524ms
011 = 1.049s
100 =2.097s
101 = 4.194s
110 = 8.389s
111 = 16.78s
Table 6. Control Bank PWM Configuration Registers (Addresses 0x14 to 0x19)
Address
0x14
0x15
0x16
0x17
0x18
0x19
Function
Control Bank A PWM Configuration Register
Control Bank B PWM Configuration Register
Control Bank C PWM Configuration Register
Control Bank D PWM Configuration Register
Control Bank E PWM Configuration Register
Control Bank F PWM Configuration Register
[Bit 7:6]
Not Used
Table 7. Control Bank PWM Configuration Register Bit Settings
Bit 5
Zone 4 PWM
Enabled
0 = PWM input is
disabled in Zone 4
1 = PWM input is
enabled in Zone 4
(Default)
Bit 4
Zone 3 PWM
Enabled
0 = PWM input is
disabled in Zone 3
1 = PWM input is
enabled in Zone 3
(Default)
Bit 3
Zone 2 PWM
Enabled
0 = PWM input is
disabled in Zone
2
1 = PWM input is
enabled in Zone
2 (Default)
Bit 2
Zone 1 PWM
Enabled
0 = PWM input is
disabled in Zone
1 (Default)
1 = PWM input is
enabled in Zone
1
Bit 1
Zone 0 PWM
Enabled
0 = PWM input is
disabled in Zone
0 (Default)
1 = PWM input is
enabled in Zone
0
Bit 0
PWM Enabled
0 = PWM Input is
disabled
(Default)
1 = PWM Input is
enabled
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