ADS8862_14 Datasheet, PDF (35/46 Pages) Texas Instruments – 16-Bit, 680-kSPS, Serial Interface, microPower, Miniature Single-Ended Input, SAR Analog-to-Digital Converter

ADS8862
www.ti.com
SBAS570A – MAY 2013 – REVISED DECEMBER 2013
Ultralow-Power DAQ Circuit at 10 kSPS
The data acquisition circuit shown in Figure 70 is optimized for using the ADS8862 at a reduced throughput of 10
kSPS with ultralow-power consumption (< 300 µW) targeted at portable and battery-powered applications.
In order to save power, this circuit is operated on a single 3.3-V supply. The circuit uses the OPA333 with a
maximum quiescent current of 28 µA in order to drive the ADC input. The input amplifier is configured in a
modified unity-gain buffer configuration. The filter capacitor at the ADC inputs attenuates the sampling charge-
injection noise from the ADC but effects the stability of the input amplifiers by degrading the phase margin. This
attenuation requires a series isolation resistor to maintain amplifier stability. The value of the series resistor is
directly proportional to the open-loop output impedance of the driving amplifier to maintain stability, which is high
(in the order of kΩ) in the case of low-power amplifiers such as the OPA333. Therefore, a high value of 1 kΩ is
selected for the series resistor at the ADC inputs. However, this series resistor creates an additional voltage drop
in the signal path, thereby leading to linearity and distortion issues. The dual-feedback configuration used in
Figure 70 corrects for this additional voltage drop and maintains system performance at ultralow-power
consumption.
1 k
REFERENCE DRIVE CIRCUIT
REF3330
IN OUT
GND
3.3 V
10 k
-
2.2 k
++
OPA333
3.3 V
INPUT DRIVER
2.4 nF
20 k
-
1 k
VIN
+ ⁺ _OPA333
3.3 V
3.3V
REF AVDD
AINP
CONVST
ADS8862
AINM
GND
CONVST
16-Bit 680-kSPS
SAR ADC
Figure 70. Ultralow-Power DAQ Circuit at 10 kSPS
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