TPS54140A Datasheet, PDF (33/51 Pages) Texas Instruments – 1.5-A, 42 V Step Down SWIFT™ DC/DC Converter with Eco-mode™

TPS54140A
www.ti.com
SLVSB55A – MAY 2012 – REVISED JULY 2012
For this example design, a ceramic capacitor with at least a 20 V voltage rating is required to support the
maximum input voltage. Common standard ceramic capacitor voltage ratings include 4 V, 6.3 V, 10 V, 16V, 25 V,
50 V or 100V so a 25 V capacitor should be selected. For this example, two 2.2 μF, 25 V capacitors in parallel
have been selected. Table 2 shows a selection of high voltage capacitors. The input capacitance value
determines the input ripple voltage of the regulator. The input voltage ripple can be calculated using Equation 39.
Using the design example values, Ioutmax = 1.5 A, Cin = 4.4 μF, ƒsw = 1200 kHz, yields an input voltage ripple
of 71 mV and a rms input ripple current of 0.701 A.
( ) _{ICI(rms) = IOUT ´}
V_{OUT ´} ^VIN(min) ^{- VOUT}
V_IN(min)
V_IN(min)
(38)
DV_IN
=
I_OUT(max) ´ 0.25
C_IN ´ f_SW
(39)
VENDOR
Murata
Vishay
TDK
AVX
VALUE (μF)
1.0 to 2.2
1.0 to 4.7
1.0
1.0 to 2.2
1.0 10 1.8
1.0 to 1.2
1.0 to 3.9
1.0 to 1.8
1.0 to 2.2
1.5 to 6.8
1.0. to 2.2
1.0 to 3.3
1.0 to 4.7
1.0
1.0 to 4.7
1.0 to 2.2
Table 2. Capacitor Types
EIA Size
1210
1206
2220
2225
1812
1210
1210
1812
VOLTAGE
100 V
50 V
100 V
50 V
50 V
100 V
50 V
100 V
100 V
50 V
100 V
50 V
50 V
100 V
50 V
100 V
DIALECTRIC
COMMENTS
GRM32 series
GRM31 series
VJ X7R series
X7R
C series C4532
C series C3225
X7R dielectric series
Slow Start Capacitor
The slow start capacitor determines the minimum amount of time it will take for the output voltage to reach its
nominal programmed value during power up. This is useful if a load requires a controlled voltage slew rate. This
is also used if the output capacitance is very large and would require large amounts of current to charge the
capacitor to the output voltage level. The large currents necessary to charge the capacitor may make the
TPS54140A reach the current limit or excessive current draw from the input power supply may cause the input
voltage rail to sag. Limiting the output voltage slew rate solves both of these problems.
The slow start time must be long enough to allow the regulator to charge the output capacitor up to the output
voltage without drawing excessive current. Equation 40 can be used to find the minimum slow start time, tss,
necessary to charge the output capacitor, Cout, from 10% to 90% of the output voltage, Vout, with an average
slow start current of Issavg. In the example, to charge the 47 μF output capacitor up to 3.3V while only allowing
the average input current to be 0.125 A would require a 1 ms slow start time.
Once the slow start time is known, the slow start capacitor value can be calculated using Equation 6. For the
example circuit, the slow start time is not too critical since the output capacitor value is 47 μF which does not
require much current to charge to 3.3V. The example circuit has the slow start time set to an arbitrary value of
1ms which requires a 3.3 nF capacitor.
t_SS
>
C_OUT ´ V_OUT
I_SS(avg)
´ 0.8
(40)
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