TMS470R1VF45BA Datasheet, PDF (33/59 Pages) Texas Instruments – 16/32-BIT RISC FLASH MICROCONTROLLER

TMS470R1VF55BA
16/32-BIT RISC FLASH MICROCONTROLLER
ZPLL and clock specifications (continued)
SPNS087A – AUGUST 2003 – REVISED AUGUST 2004
switching characteristics over recommended operating conditions for external clocks
(see Figure 5 and Figure 6)^{†‡§}
NO.
1 t_w(COL)
2 t_w(COH)
3 t_w(EOL)
4 t_w(EOH)
PARAMETER
TEST CONDITIONS
SYSCLK or MCLK^¶
Pulse duration, CLKOUT low _{ICLK, X is even or 1}^#
ICLK, X is odd and not 1^#
SYSCLK or MCLK^¶
Pulse duration, CLKOUT high _{ICLK, X is even or 1}^#
ICLK, X is odd and not 1^#
N is even and X is even or odd
Pulse duration, ECLK low
N is odd and X is even
N is odd and X is odd and not 1
N is even and X is even or odd
Pulse duration, ECLK high N is odd and X is even
N is odd and X is odd and not 1
MIN
0.5t_c(SYS) – t_f
0.5t_c(ICLK) – t_f
0.5t_c(ICLK)+ 0.5t_c(SYS) – t_f
0.5t_c(SYS) – t_r
0.5t_c(ICLK) – t_r
0.5t_c(ICLK)– 0.5t_c(SYS) – t_r
0.5t_c(ECLK) – t_f
0.5t_c(ECLK) – t_f
0.5t_c(ECLK)+ 0.5t_c(SYS) – t_f
0.5t_c(ECLK) – t_r
0.5t_c(ECLK) – t_r
0.5t_c(ECLK)– 0.5t_c(SYS) – t_r
MAX
UNIT
ns
ns
ns
ns
† X = {1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16}. X is the interface clock divider ratio determined by the PCR0.[4:1] bits in the SYS module.
‡ N = {1 to 256}. N is the ECP prescale value defined by the ECPCTRL.[7:0] register bits in the ECP module.
§ CLKOUT/ECLK pulse durations (low/high) are a function of the OSCIN pulse durations when PLLDIS is active.
¶ Clock source bits selected as either SYSCLK (CLKCNTL.[6:5] = 11 binary) or MCLK (CLKCNTL.[6:5] = 10 binary).
# Clock source bits selected as ICLK (CLKCNTL.[6:5] = 01 binary).
CLKOUT
2
1
Figure 5. CLKOUT Timing Diagram
ECLK
4
3
Figure 6. ECLK Timing Diagram
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