TUSB4041I-Q1 Datasheet, PDF (32/44 Pages) Texas Instruments – Four-Port USB 2.0 Hub

TUSB4041I-Q1
SLLSEK4B – JULY 2015 – REVISED JANUARY 2016
www.ti.com
9.2.2.7 Clock, Reset, and Miscellaneous
The PWRCTL_POL is left unconnected which results in active-high power enable (PWRCTL1, PWRCTL2,
PWRCTL3, and PWRCTL4) for a USB VBUS power switch. The 1-µF capacitor on the GRSTN pin can only be
used if the VDD11 supply is stable before the VDD33 supply. Depending on the supply ramp of the two supplies,
the user may need to adjust the capacitor.
C29
1 µF
R14
1M
Y1
U1F
18
GRSTZ
30
XI
29
XO
5
SDA/SMBDAT
6
SCL/SMBDAT
7
SMBUSZ
13
AUTOENZ/HS_SUSPEND
9
PWRCTL_POL
17
TEST
32
USB_R1
24 MHz
C30
18 pF
TUSB4041I_PAP
C31
18 pF
R15
9.53 KΩ
0402
1%
R16
4.7 KΩ
R18
4.7 KΩ
Figure 32. Clock, Reset, and Miscellaneous
9.2.2.8 TUSB4041I-Q1 Power Implementation
VDD11
U1G
23
24 ^RSVD
26 ^RSVD
27 ^RSVD
35 ^RSVD
36 ^RSVD
38 ^RSVD
39 ^RSVD
43 ^RSVD
44 ^RSVD
46 ^RSVD
47 ^RSVD
51 ^RSVD
52 ^RSVD
54 ^RSVD
55 ^RSVD
58 ^RSVD
59 ^RSVD
61 ^RSVD
62 ^RSVD
RSVD
28
40 ^NC
NC
C16
0.1 µF
C17
0.1 µF
2
VDD33 ₂₀
VDD33 ₃₁
VDD33 ₄₈
VDD33
C24
0.1 µF
C25
0.1 µF
C18
0.1 µF
C19
0.1 µF
VDD33
C26
0.1 µF
C27
0.1 µF
C20
0.1 µF
C21
0.1 µF
C22
0.1 µF
BOARD_1P1V
FB5
C23
220 at 100 MHz
10 µF
C28
10 µF
BOARD_3P3V
FB6
220 at 100 MHz
TUSB4041I_PAP
Figure 33. TUSB4041I-Q1 Power Implementation
32
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