TMS570LS1225 Datasheet, PDF (32/176 Pages) Texas Instruments – 16- and 32-Bit RISC Flash Microcontroller

TMS570LS1225
SPNS191B – OCTOBER 2012 – REVISED FEBRUARY 2015
www.ti.com
4.3.2.13 Multibuffered Serial Peripheral Interface Modules (MibSPI)
Table 4-33. ZWT Multibuffered Serial Peripheral Interface Modules (MibSPI)
Terminal
Signal Name
MIBSPI1CLK
MIBSPI1NCS[0]/MIBSPI1SOMI[1]/ECAP6
MIBSPI1NCS[1]/N2HET1[17]/EQEP1S
MIBSPI1NCS[2]/N2HET1[19]
MIBSPI1NCS[3]/N2HET1[21]
N2HET1[15]/MIBSPI1NCS[4]/ECAP1
N2HET1[24]/MIBSPI1NCS[5]
MIBSPI1NENA/N2HET1[23]/ECAP4
MIBSPI1SIMO[0]
N2HET1[8]/MIBSPI1SIMO[1]
MIBSPI1SOMI[0]
MIBSPI1NCS[0]/MIBSPI1SOMI[1]/ECAP6
337
ZWT
F18
R2
F3
G3
J3
N1
P1
G19
F19
E18
G18
R2
Signal Reset Pull
Type
State
Pull Type
Description
I/O
Pull Up Programmable, MibSPI1 clock, or GPIO
20 µA
MibSPI1 chip select, or
GPIO
Pull Down Programmable, MibSPI1 chip select, or
20 µA
GPIO
Pull Up
Pull Down
Pull Up
Programmable, MibSPI1 enable, or GPIO
20 µA
MibSPI1 slave-in master-
out, or GPIO
Programmable, MibSPI1 slave-in master-
20 µA
out, or GPIO
Programmable, MibSPI1 slave-out master-
20 µA
in, or GPIO
MIBSPI3CLK/AWM1_EXT_SEL[1]/EQEP1A
MIBSPI3NCS[0]/AD2EVT/GIOB[2]/
EQEP1I/N2HET2_PIN_nDIS
V9
I/O
V10
Pull Up
Programmable, MibSPI3 clock, or GPIO
20 µA
MibSPI3 chip select, or
GPIO
MIBSPI3NCS[1]/N2HET1[25]/MDCLK
V5
MIBSPI3NCS[2]/I2C_SDA/N2HET1[27]/nTZ2
B2
MIBSPI3NCS[3]/I2C_SCL/N2HET1[29]/nTZ1
C3
N2HET1[11]/MIBSPI3NCS[4]/N2HET2[18]/EPWM1SYNCO
E3
Pull Down Programmable, MibSPI3 chip select, or
20 µA
GPIO
MIBSPI3NENA/MIBSPI3NCS[5]/N2HET1[31]/EQEP1B
W9
Pull Up Programmable, MibSPI3 chip select, or
20 µA
GPIO
MIBSPI3NENA/MIBSPI3NCS[5]/N2HET1[31]/EQEP1B
W9
MibSPI3 enable, or GPIO
MIBSPI3SIMO[0]/AWM1_EXT_SEL[0]/ECAP3
W8
MibSPI3 slave-in master-
out, or GPIO
MIBSPI3SOMI[0]/AWM1_EXT_ENA/ECAP2
V8
MibSPI3 slave-out master-
in, or GPIO
MIBSPI5CLK
MIBSPI5NCS[0]/EPWM4A
MIBSPI5NCS[1]
MIBSPI5NCS[2]
MIBSPI5NCS[3]
MIBSPI5NENA/MIBSPI5SOMI[1]/ECAP5
MIBSPI5SIMO[0]/MIBSPI5SOMI[2]
MIBSPI5SIMO[1]
MIBSPI5SIMO[2]
MIBSPI5SIMO[3]
MIBSPI5SOMI[0]
MIBSPI5SOMI[1]
MIBSPI5NENA/MIBSPI5SOMI[1]/ECAP5
MIBSPI5SOMI[2]
MIBSPI5SIMO[0]/MIBSPI5SOMI[2]
MIBSPI5SOMI[3]
H19 I/O
E19
B6
W6
T12
H18
J19
E16
H17
G17
J18
E17
H18
H16
J19
G16
Pull Up
Programmable, MibSPI5 clock, or GPIO
20 µA
MibSPI5 chip select, or
GPIO
MibSPI5 enable, or GPIO
MibSPI5 slave-in master-
out, or GPIO
MibSPI5 slave-out master-
in, or GPIO
32
Terminal Configuration and Functions
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