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LM3S5C31 Datasheet, PDF (32/1220 Pages) Texas Instruments – Stellaris® LM3S5C31 Microcontroller
Table of Contents
Register 5:
Register 6:
Register 7:
Register 8:
Analog Comparator Status 0 (ACSTAT0), offset 0x020 ..................................................... 975
Analog Comparator Status 1 (ACSTAT1), offset 0x040 ..................................................... 975
Analog Comparator Control 0 (ACCTL0), offset 0x024 ..................................................... 976
Analog Comparator Control 1 (ACCTL1), offset 0x044 ..................................................... 976
Pulse Width Modulator (PWM) .................................................................................................... 978
Register 1: PWM Master Control (PWMCTL), offset 0x000 ................................................................ 993
Register 2: PWM Time Base Sync (PWMSYNC), offset 0x004 ........................................................... 994
Register 3: PWM Output Enable (PWMENABLE), offset 0x008 .......................................................... 995
Register 4: PWM Output Inversion (PWMINVERT), offset 0x00C ....................................................... 997
Register 5: PWM Output Fault (PWMFAULT), offset 0x010 ................................................................ 999
Register 6: PWM Interrupt Enable (PWMINTEN), offset 0x014 ......................................................... 1001
Register 7: PWM Raw Interrupt Status (PWMRIS), offset 0x018 ...................................................... 1003
Register 8: PWM Interrupt Status and Clear (PWMISC), offset 0x01C .............................................. 1005
Register 9: PWM Status (PWMSTATUS), offset 0x020 .................................................................... 1007
Register 10: PWM Fault Condition Value (PWMFAULTVAL), offset 0x024 ........................................... 1009
Register 11: PWM Enable Update (PWMENUPD), offset 0x028 ......................................................... 1011
Register 12: PWM0 Control (PWM0CTL), offset 0x040 ...................................................................... 1014
Register 13: PWM1 Control (PWM1CTL), offset 0x080 ...................................................................... 1014
Register 14: PWM2 Control (PWM2CTL), offset 0x0C0 ..................................................................... 1014
Register 15: PWM0 Interrupt and Trigger Enable (PWM0INTEN), offset 0x044 ................................... 1019
Register 16: PWM1 Interrupt and Trigger Enable (PWM1INTEN), offset 0x084 ................................... 1019
Register 17: PWM2 Interrupt and Trigger Enable (PWM2INTEN), offset 0x0C4 ................................... 1019
Register 18: PWM0 Raw Interrupt Status (PWM0RIS), offset 0x048 ................................................... 1022
Register 19: PWM1 Raw Interrupt Status (PWM1RIS), offset 0x088 ................................................... 1022
Register 20: PWM2 Raw Interrupt Status (PWM2RIS), offset 0x0C8 .................................................. 1022
Register 21: PWM0 Interrupt Status and Clear (PWM0ISC), offset 0x04C .......................................... 1024
Register 22: PWM1 Interrupt Status and Clear (PWM1ISC), offset 0x08C .......................................... 1024
Register 23: PWM2 Interrupt Status and Clear (PWM2ISC), offset 0x0CC .......................................... 1024
Register 24: PWM0 Load (PWM0LOAD), offset 0x050 ...................................................................... 1026
Register 25: PWM1 Load (PWM1LOAD), offset 0x090 ...................................................................... 1026
Register 26: PWM2 Load (PWM2LOAD), offset 0x0D0 ...................................................................... 1026
Register 27: PWM0 Counter (PWM0COUNT), offset 0x054 ............................................................... 1027
Register 28: PWM1 Counter (PWM1COUNT), offset 0x094 ............................................................... 1027
Register 29: PWM2 Counter (PWM2COUNT), offset 0x0D4 .............................................................. 1027
Register 30: PWM0 Compare A (PWM0CMPA), offset 0x058 ............................................................ 1028
Register 31: PWM1 Compare A (PWM1CMPA), offset 0x098 ............................................................ 1028
Register 32: PWM2 Compare A (PWM2CMPA), offset 0x0D8 ............................................................ 1028
Register 33: PWM0 Compare B (PWM0CMPB), offset 0x05C ............................................................ 1029
Register 34: PWM1 Compare B (PWM1CMPB), offset 0x09C ............................................................ 1029
Register 35: PWM2 Compare B (PWM2CMPB), offset 0x0DC ........................................................... 1029
Register 36: PWM0 Generator A Control (PWM0GENA), offset 0x060 ............................................... 1030
Register 37: PWM1 Generator A Control (PWM1GENA), offset 0x0A0 ............................................... 1030
Register 38: PWM2 Generator A Control (PWM2GENA), offset 0x0E0 ............................................... 1030
Register 39: PWM0 Generator B Control (PWM0GENB), offset 0x064 ............................................... 1033
Register 40: PWM1 Generator B Control (PWM1GENB), offset 0x0A4 ............................................... 1033
Register 41: PWM2 Generator B Control (PWM2GENB), offset 0x0E4 ............................................... 1033
Register 42: PWM0 Dead-Band Control (PWM0DBCTL), offset 0x068 ............................................... 1036
Register 43: PWM1 Dead-Band Control (PWM1DBCTL), offset 0x0A8 ............................................... 1036
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January 23, 2012
Texas Instruments-Production Data