TMS320F28027_14 Datasheet, PDF (31/132 Pages) Texas Instruments – Piccolo™ Microcontrollers

TMS320F28027, TMS320F28026, TMS320F28023, TMS320F28022
TMS320F28021, TMS320F28020, TMS320F280200
www.ti.com
SPRS523J – NOVEMBER 2008 – REVISED OCTOBER 2013
3.3 Register Map
The devices contain three peripheral register spaces. The spaces are categorized as follows:
Peripheral Frame 0: These are peripherals that are mapped directly to the CPU memory bus.
See Table 3-8.
Peripheral Frame 1: These are peripherals that are mapped to the 32-bit peripheral bus. See
Table 3-9.
Peripheral Frame 2: These are peripherals that are mapped to the 16-bit peripheral bus. See
Table 3-10.
Table 3-8. Peripheral Frame 0 Registers⁽¹⁾
NAME
Device Emulation Registers
System Power Control Registers
FLASH Registers⁽³⁾
Code Security Module Registers
ADC registers
(0 wait read only)
CPU–TIMER0/1/2 Registers
PIE Registers
PIE Vector Table
ADDRESS RANGE
0x00 0880 – 0x00 0984
0x00 0985 – 0x00 0987
0x00 0A80 – 0x00 0ADF
0x00 0AE0 – 0x00 0AEF
0x00 0B00 – 0x00 0B0F
0x00 0C00 – 0x00 0C3F
0x00 0CE0 – 0x00 0CFF
0x00 0D00 – 0x00 0DFF
SIZE (×16)
261
3
96
16
16
64
32
256
EALLOW PROTECTED⁽²⁾
Yes
Yes
Yes
Yes
No
No
No
No
(1) Registers in Frame 0 support 16-bit and 32-bit accesses.
(2) If registers are EALLOW protected, then writes cannot be performed until the EALLOW instruction is executed. The EDIS instruction
disables writes to prevent stray code or pointers from corrupting register contents.
(3) The Flash Registers are also protected by the Code Security Module (CSM).
Table 3-9. Peripheral Frame 1 Registers
NAME
ADDRESS RANGE
SIZE (×16)
Comparator 1 registers
0x00 6400 – 0x00 641F
32
Comparator 2 registers
0x00 6420 – 0x00 643F
32
ePWM1 + HRPWM1 registers
0x00 6800 – 0x00 683F
64
ePWM2 + HRPWM2 registers
0x00 6840 – 0x00 687F
64
ePWM3 + HRPWM3 registers
0x00 6880 – 0x00 68BF
64
ePWM4 + HRPWM4 registers
0x00 68C0 – 0x00 68FF
64
eCAP1 registers
0x00 6A00 – 0x00 6A1F
32
GPIO registers
0x00 6F80 – 0x00 6FFF
128
(1) Some registers are EALLOW protected. See the module reference guide for more information.
EALLOW PROTECTED
(1)
(1)
(1)
(1)
(1)
(1)
No
(1)
Table 3-10. Peripheral Frame 2 Registers
NAME
System Control Registers
SPI-A Registers
SCI-A Registers
NMI Watchdog Interrupt Registers
External Interrupt Registers
ADC Registers
I2C-A Registers
ADDRESS RANGE
0x00 7010 – 0x00 702F
0x00 7040 – 0x00 704F
0x00 7050 – 0x00 705F
0x00 7060 – 0x00 706F
0x00 7070 – 0x00 707F
0x00 7100 – 0x00 717F
0x00 7900 – 0x00 793F
SIZE (×16)
32
16
16
16
16
128
64
(1) Some registers are EALLOW protected. See the module reference guide for more information.
EALLOW PROTECTED
Yes
No
No
Yes
Yes
(1)
(1)
Copyright © 2008–2013, Texas Instruments Incorporated
Functional Overview
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