THS7364_14 Datasheet, PDF (31/49 Pages) Texas Instruments – 6-Channel Video Amplifier with 3 SD and 3 Full-HD Filters with 6-dB Gain

THS7364
www.ti.com
SBOS530 – AUGUST 2010
This discharge current must not be large enough to
alter the video signal appreciably or picture quality
issues may arise. This effect is often seen by looking
at the tilt (droop) of a constant luma signal being
applied and the resulting output level. The associated
change in luma level from the beginning and end of
the video line is the amount of line tilt (droop).
If the discharge current is very small, the amount of
tilt is very low, which is a generally a good thing.
However, the amount of time for the system to
capture the sync signal could be too long. This effect
is also termed hum rejection. Hum arises from the ac
line voltage frequency of 50 Hz or 60 Hz. The value
of the discharge current and the ac-coupling capacitor
combine to dictate the hum rejection and the amount
of line tilt.
To allow for both dc- and ac-coupling in the same
part, the THS7364 incorporates an 800-kΩ resistor to
ground. Although a true constant current sink is
preferred over a resistor, there can be issues when
the voltage is near ground. This configuration can
cause the current sink transistor to saturate and
cause potential problems with the signal. The 800-kΩ
resistor is large enough to not impact a dc-coupled
DAC termination. For discharging an ac-coupled
source, Ohm’s Law is used. If the video signal is 1 V,
then there is 1 V/800 kΩ = 1.25-mA of discharge
current. If more hum rejection is desired or there is a
loss of sync occurring, then simply decrease the
0.1-mF input coupling capacitor. A decrease from
0.1 mF to 0.047 mF increases the hum rejection by a
factor of 2.1. Alternatively, an external pull-down
resistor to ground may be added that decreases the
overall resistance and ultimately increases the
discharge current.
To ensure proper stability of the ac STC control loop,
the source impedance must be less than 1-kΩ with
the input capacitor in place. Otherwise, there is a
possibility of the control loop ringing, which may
appear on the output of the THS7364. Because most
DACs or encoders use resistors to establish the
voltage, which are typically less than 300-Ω, meeting
the less than 1-kΩ requirement is easily done.
However, if the source impedance looking from the
THS7364 input perspective is very high, then simply
adding a 1-kΩ resistor to GND ensures proper
operation of the THS7364.
INPUT MODE OF OPERATION: AC BIAS
Sync-tip clamps work very well for signals that have
horizontal and/or vertical syncs associated with them;
however, some video signals do not have a sync
embedded within the signal. If ac-coupling of these
signals is desired, then a dc bias is required to
properly set the dc operating point within the
THS7364. This function is easily accomplished with
the THS7364 by simply adding an external pull-up
resistor to the positive power supply, as shown in
Figure 80.
+3.3 V
Input
C_IN
0.1 mF
R_PU
Input
Pin
+3.3 V
800 kW
Internal
Circuitry
Level
Shift
Figure 80. AC-Bias Input Mode Circuit
Configuration
The dc voltage appearing at the input pin is equal to
Equation 1:
V_DC = V_S
800 kW
800 kW + R_PU
(1)
The THS7364 allowable input range is approximately
0 V to (V_S+ – 1.5 V), allowing for a very wide input
voltage range. As such, the input dc bias point is very
flexible, with the output dc bias point being the
primary factor. For example, if the output dc bias
point is desired to be 1.6 V on a 3.3-V supply, then
the input dc bias point should be (1.6 V – 300 mV)/2
= 0.65 V. Thus, the pull-up resistor calculates to
approximately 3.3 MΩ, resulting in 0.644 V. If the
output dc-bias point is desired to be 1.6 V with a 5-V
power supply, then the pull-up resistor calculates to
approximately 5.36 MΩ.
Keep in mind that the internal 800-kΩ resistor has
approximately a ±20% variance. As such, the
calculations should take this variance into account.
For the 0.644-V example above, using an ideal
3.3-MΩ resistor, the input dc bias voltage is
approximately 0.644 V ± 0.1 V.
The value of the output bias voltage is very flexible
and is left to each individual design. It is important to
ensure that the signal does not clip or saturate the
video signal. Thus, it is recommended to ensure the
output bias voltage is between 0.9 V and (V_S+ – 1 V).
For 100% color saturated CVBS or signals with
Macrovision^®, the CVBS signal can reach up to
1.23 V_PP at the input, or 2.46 V_PP at the output of the
THS7364. In contrast, other signals are typically
1 V_PP or 0.7 V_PP at the input which translate to an
output voltage of 2 V_PP or 1.4 V_PP. The output bias
voltage must account for a worst-case situation,
depending on the signals involved.
Copyright © 2010, Texas Instruments Incorporated
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