THS4503-EP Datasheet, PDF (31/38 Pages) Texas Instruments – WIDEBAND, LOW-DISTORTION FULLY DIFFERENTIAL AMPLIFIERS

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The thermal characteristics of the device are dictated by
the package and the PC board. Maximum power
dissipation for a given package can be calculated using the
following formula.
P _Dmax
+
T_max–T_A
q_JA
(28)
Where:
P_Dmax is the maximum power dissipation in the amplifier (W).
T_max is the absolute maximum junction temperature (°C).
T_A is the ambient temperature (°C).
θ_JA = θ_JC + θ_CA
θ_JC is the thermal coefficient from the silicon junctions to the
case (°C/W).
θ_CA is the thermal coefficient from the case to ambient air
(°C/W).
For systems where heat dissipation is more critical, the
THS4500 family of devices is offered in an 8-pin MSOP
with PowerPAD. The thermal coefficient for the MSOP
PowerPAD package is substantially improved over the
traditional SOIC. Maximum power dissipation levels are
depicted in the graph for the two packages. The data for
the DGN package assumes a board layout that follows the
PowerPAD layout guidelines referenced above and
detailed in the PowerPAD application notes in the
Additional Reference Material section at the end of the
data sheet.
THS4503−EP
SGLS291A − APRIL 2005 − JANUARY 2012
DRIVING CAPACITIVE LOADS
High-speed amplifiers are typically not well-suited for
driving large capacitive loads. If necessary, however, the
load capacitance should be isolated by two isolation
resistors in series with the output. The requisite isolation
resistor size depends on the value of the capacitance, but
10 Ω to 25 Ω is a good place to begin the optimization
process. Larger isolation resistors decrease the amount of
peaking in the frequency response induced by the
capacitive load, but this comes at the expense of larger
voltage drop across the resistors, increasing the output
swing requirements of the system.
R_f
V_S
R_S
R_g
V_S
+_−
R_T
−⁺
−V_S
R_iso
C_L
R_iso
Riso = 10 − 25 Ω
R_f
R_g
Use of Isolation Resistors With a Capacitive Load.
Figure 115
3.5
8-Pin DGN Package
3
2.5
2
8-Pin D Package
1.5
1
0.5
0
−40 −20 0
20 40 60 80
T_A − Ambient Temperature − °C
θ_JA = 170°C/W for 8-Pin SOIC (D)
θ_JA = 58.4°C/W for 8-Pin MSOP (DGN)
Τ_J = 150°C, No Airflow
Figure 114. Maximum Power Dissipation vs
Ambient Temperature
When determining whether or not the device satisfies the
maximum power dissipation requirement, it is important to
not only consider quiescent power dissipation, but also
dynamic power dissipation. Often times, this is difficult to
quantify because the signal pattern is inconsistent, but an
estimate of the RMS power dissipation can provide
visibility into a possible problem.
POWER SUPPLY DECOUPLING
TECHNIQUES AND RECOMMENDATIONS
Power supply decoupling is a critical aspect of any
high-performance amplifier design process. Careful
decoupling provides higher quality ac performance (most
notably improved distortion performance). The following
guidelines ensure the highest level of performance.
1. Place decoupling capacitors as close to the power
supply inputs as possible, with the goal of minimizing
the inductance of the path from ground to the power
supply.
2. Placement priority should be as follows: smaller
capacitors should be closer to the device.
3. Use of solid power and ground planes is
recommended to reduce the inductance along power
supply return current paths.
4. Recommended values for power supply decoupling
include 10-μF and 0.1-μF capacitors for each supply.
A 1000-pF capacitor can be used across the supplies
as well for extremely high frequency return currents,
but often is not required.
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