TPS54116-Q1 Datasheet, PDF (30/41 Pages) Texas Instruments – 2.95-V to 6-V Input, 4-A Step-Down Converter and 1-A Source/Sink DDR Termination Regulator

TPS54116-Q1
SLVSCO3A – AUGUST 2016 – REVISED AUGUST 2016
www.ti.com
To get started, the modulator pole, fpmod, and the ESR zero, fz1 must be calculated using Equation 23 and
Equation 24. For Cout, use a derated value of 154 μF. Use equations Equation 25 and Equation 26, to estimate
a starting point for the crossover frequency, fco, to design the compensation. For the example design, fpmod is
2.8 kHz and fzmod is 388 kHz. Equation 25 is the geometric mean of the modulator pole and the esr zero and
Equation 26 is the mean of modulator pole and one half the switching frequency or 250 kHz, whichever is larger.
For the 2.1 MHz switching frequency application 250 kHz is used so Equation 25 yields 33 kHz and Equation 26
gives 52 kHz. Use the lower value of Equation 25 or Equation 26 for an initial crossover frequency. Next, the
compensation components are calculated. A resistor-in-series with a capacitor is used to create a compensating
zero. A capacitor in parallel to these two components forms the compensating pole.
¦p mod =
Ioutmax
2 × p × Vout × Cout
(23)
1
¦z mod =
2 ´ p ´ Resr × Cout
(24)
f_co = f _pmod´ f_zmod
(25)
f_co =
f _pmod´
f_sw
2
(26)
To determine the compensation resistor, R6, use Equation 27. Assume the power stage transconductance,
gmps, is 16 A/V. The output voltage, Vo, reference voltage, VREF, and amplifier transconductance, gmea, are
1.5 V, 0.6 V and 260 μA/V, respectively. R6 is calculated to be 19 kΩ and the closest standard value 19.1 kΩ.
Use Equation 28 to set the compensation zero to the modulator pole frequency. Equation 28 yields 3020 pF for
compensating capacitor C6 and the closest standard value is 3300 pF.
R_COMP
§
¨
2
u
S
u
f_CO
u
C_OUT
©
gm_PS
·§
¸u¨
¹©
V_OUT
V_REF u gm_EA
·
¸
¹
(27)
C_COMP
1
2 u S u R_COMP u f_PMOD
(28)
A compensation pole is implemented using an additional capacitor C7 in parallel with the series combination of
R6 and C6. This capacitor is recommended to help filter any noise that may couple to the COMP voltage signal.
Use the larger value of Equation 29 and Equation 30 to calculate the C7, to set the compensation pole. C7 is
calculated to 21 pF or 8 pF and the closest standard value is 22 pF.
C_HF
C_OUT u R_ESR
R_COMP
(29)
C_HF
1
S u R_COMP u f_SW
(30)
Type III compensation is used by adding the feed forward capacitor (C17) in parallel with the upper feedback
resistor. This increases the crossover and adds phase boost above what is normally possible from Type II
compensation. It places an additional zero/pole pair. This zero and pole pair is not independent. Once the zero
location is chosen, the pole is fixed as well. The zero is placed at the intended crossover frequency by
calculating the value of C17 with Equation 31. The calculated value is 216 pF and the closest standard value is
220 pF.
C_FF
1
3 u S u R_FBT u f_CO
(31)
The initial compensation based on these calculations is R6 = 19.1 kΩ, C6 = 3300 pF, C7 = 22 pF and C17 = 220
pF. These values yield a stable design but after testing the real circuit these values were changed to optimize
performance. The final values used in the schematic are R6 = 20.5 kΩ, C6 = 1800 pF, C7 = 180 pF and C17 =
180 pF.
8.2.2.12 LDOIN Capacitor
Depending on the trace impedance between the LDOIN bulk power supply to the device, a transient increase of
source current is supplied mostly by the charge from the LDOIN input capacitor. Use a 10-µF (or greater) and
X5R grade (or better) ceramic capacitor to supply this transient charge.
30
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