PCM1791A_09 Datasheet, PDF (30/61 Pages) Texas Instruments – AUDIO STEREO DIGITAL-TO-ANALOG CONVERTER

PCM1791A
SLES071B − MARCH 2003 − REVISED NOVEMBER 2006
OPE: DAC Operation Control
This bit is available for read and write.
Default value: 0
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OPE = 0
OPE = 1
DAC operation enabled (default)
DAC operation disabled
The OPE bit enables or disables the analog output for both channels. Disabling the analog outputs forces them to
the bipolar zero level (BPZ) even if digital audio data is present on the input.
FLT: Digital Filter Rolloff Control
This bit is available for read and write.
Default value: 0
FLT = 0
FLT = 1
Sharp rolloff (default)
Slow rolloff
The FLT bit selects the digital filter rolloff characteristic. The filter responses for these selections are shown in the
TYPICAL PERFORMANCE CURVES section of this data sheet.
INZD: Infinite Zero Detect Mute Control
This bit is available for read and write.
Default value: 0
INZD = 0
INZD = 1
Infinite zero detect mute disabled (default)
Infinite zero detect mute enabled
The INZD bit enables or disables the zero detect mute function. Setting INZD to 1 forces muted analog outputs to
hold a bipolar zero level when the PCM1791A detects a zero condition in both channels. The infinite zero detect mute
function is not available in the DSD mode.
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4
B3
B2 B1 B0
Register 20 R/W 0
0
1
0
1
0
0 RSV SRST DSD DFTH MONO CHSL OS1 OS0
R/W: Read/Write Mode Select
When R/W = 0, a write operaton is performed.
When R/W = 1, a read operaton is performed.
Default value: 0
SRST: System Reset Control
This bit is available for write only.
Default value: 0
SRST = 0
SRST = 1
Normal operation (default)
System reset operation (generate one reset pulse)
The SRST bit resets the PCM1791A to the initial system condition.
DSD: DSD Interface Mode Control
This bit is available for read and write.
Default value: 0
DSD = 0
DSD = 1
DSD interface mode disabled (default)
DSD interface mode enabled
The DSD bit enables or disables the DSD interface mode.
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