TUSB320 Datasheet, PDF (3/35 Pages) Texas Instruments – USB Type-C Configuration Channel Logic and Port Control

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5 Pin Configuration and Functions
RWB Package
12-Pin X2QFN
Top View
TUSB320, TUSB320I
SLLSEN9C – MAY 2015 – REVISED SEPTEMBER 2016
PORT 3
VBUS_DET 4
ADDR 5
INT_N/OUT3 6
2
1
7
8
12 VDD
11 EN_N
10 _GND
9 ID
NAME
CC1
CC2
PIN
NO.
1
2
PORT ⁽¹⁾
3
VBUS_DET ⁽¹⁾
4
ADDR ⁽¹⁾
5
INT_N/OUT3 ⁽¹⁾
6
SDA/OUT1 ⁽¹⁾⁽²⁾
7
SCL/OUT2 ^{(1) (2)}
8
ID ⁽¹⁾
9
GND
10
EN_N
11
V_DD
12
Pin Functions
I/O
DESCRIPTION
I/O
Type-C configuration channel signal 1
I/O
Type-C configuration channel signal 2
Tri-level input pin to indicate port mode. The state of this pin is sampled when EN_N is asserted low and VDD
is active. This pin is also sampled following a I2C_SOFT_RESET.
I
H - DFP (Pull-up to V_DD if DFP mode is desired)
NC - DRP (Leave unconnected if DRP mode is desired)
L - UFP (Pull-down or tie to GND if UFP mode is desired)
I
5- to 28-V V_BUS input voltage. V_BUS detection determines UFP attachment. One 900-kΩ external resistor
required between system V_BUS and VBUS_DET pin.
Tri-level input pin to indicate I²C address or GPIO mode:
H - I²C is enabled and I²C 7-bit address is 0x61.
I
NC - GPIO mode (I²C is disabled)
L - I²C is enabled and I²C 7-bit address is 0x60.
ADDR pin should be pulled up to V_DD if high configuration is desired
The INT_N/OUT3 is a dual-function pin. When used as the INT_N, the pin is an open drain output in I²C control
O
mode and is an active low interrupt signal for indicating changes in I²C registers. When used as OUT3, the pin
is in audio accessory detect in GPIO mode: no detection (H), audio accessory connection detected (L).
The SDA/OUT1 is a dual-function pin. When I²C is enabled (ADDR pin is high or low), this pin is the I²C
I/O
communication data signal. When in GPIO mode (ADDR pin is NC), this pin is an open drain output for
communicating Type-C current mode detect when the TUSB320 device is in UFP mode: default current mode
detected (H); medium or high current mode detected (L).
The SCL/OUT2 is a dual function pin. When I²C is enabled (ADDR pin is high or low), this pin is the I²C
I/O
communication clock signal. When in GPIO mode (ADDR pin is NC), this pin is an open drain output for
communicating Type-C current mode detect when the TUSB320 device is in UFP mode: default or medium
current mode detected (H); high current mode detected (L).
O
Open drain output; asserted low when the CC pins detect device attachment when port is a source (DFP), or
dual-role (DRP) acting as source (DFP).
G
Ground
I
Enable signal; active low. Pulled up to V_DD internally to disable the TUSB320 device. If controlled externally,
must be held high at least for 50 ms after V_DD has reached its valid voltage level.
P
Positive supply voltage. V_DD must ramp within 25 ms or less
(1) When V_DD is off, the TUSB320 non-failsafe pins (VBUS_DET, ADDR, PORT, ID, OUT[3:1] pins) could back-drive the TUSB320 device if
not handled properly. When necessary to pull these pins up, it is recommended to pullup PORT, ADDR, INT_N/OUT3, and ID to the
device V_DD supply. The VBUS_DET must be pulled up to VBUS through a 900-kΩ resistor.
(2) When using the 3.3 V supply for I²C, the end user must ensure that the V_DD is 3 V and above. Otherwise the I²C may back power the
device.
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