TPS7A92 Datasheet, PDF (3/33 Pages) Texas Instruments – 2-A, High-Accuracy, Low-Noise LDO Voltage Regulator

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5 Pin Configuration and Functions
DSK Package
2.5-mm × 2.5-mm 10-Pin WSON
Top View
TPS7A92
SBVS318 – JULY 2017
OUT
OUT
FB
GND
PG
1
10
2
9
3
Thermal
8
Pad
4
7
5
6
IN
IN
NR/SS
EN
SS_CTRL
NAME
EN
FB
GND
IN
NR/SS
OUT
PG
SS_CTRL
Thermal pad
PIN
NO.
7
3
4
9, 10
8
1, 2
5
6
Not to scale
Pin Functions
I/O
DESCRIPTION
I
Enable pin. This pin turns the LDO on and off. If V_EN ≥ V_IH(EN), the regulator is enabled. If V_EN ≤ V_IL(EN), the
regulator is disabled. The EN pin must be connected to IN if the enable function is not used.
I
Feedback pin. This pin is the input to the control loop error amplifier and is used to set the output voltage of the
device.
— Device GND. Connect to the device thermal pad.
I Input pin. A 10 µF or greater input capacitor is required.
Noise reduction pin. Connect this pin to an external capacitor to bypass the noise generated by the internal band-
— gap reference. The capacitor reduces the output noise to very low levels and sets the output ramp rate to limit
inrush current.
O Regulated output. A 22 µF or greater capacitor must be connected from this pin to GND for stability.
O
Open-drain power-good indicator pin for the LDO output voltage. A 10-kΩ to 100-kΩ external pullup resistor is
required. This pin can be left floating or connected to GND if not used.
I
Soft-start control pin. Connect this pin either to GND or IN to change the NR/SS capacitor charging current. If a
C_NR/SS capacitor is not used, SS_CTRL must be connected to GND to avoid output overshoot.
— Connect the thermal pad to the printed circuit board (PCB) ground plane, for an example layout see Figure 42.
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