TPS43333-Q1 Datasheet, PDF (3/42 Pages) Texas Instruments – LOW IQ, SINGLE BOOST, DUAL SYNCHRONOUS BUCK CONTROLLER

TPS43333-Q1
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THERMAL INFORMATION
THERMAL METRIC⁽¹⁾
θ_JA
θ_JCtop
θ_JB
ψ_JT
ψ_JB
θ_JCbot
Junction-to-ambient thermal resistance⁽²⁾
Junction-to-case (top) thermal resistance⁽³⁾
Junction-to-board thermal resistance⁽⁴⁾
Junction-to-top characterization parameter⁽⁵⁾
Junction-to-board characterization parameter⁽⁶⁾
Junction-to-case (bottom) thermal resistance⁽⁷⁾
SLVSB48B – AUGUST 2012 – REVISED APRIL 2013
TPS43333-Q1
DAP
38 PINS
27.3
19.6
15.9
0.24
6.6
1.2
UNIT
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter, ψ_JT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ_JA, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, ψ_JB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ_JA , using a procedure described in JESD51-2a (sections 6 and 7).
(7) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
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RECOMMENDED OPERATING CONDITIONS
Buck function:
BuckA and BuckB
voltage
Boost function
Input voltage: VIN, VBAT
Enable inputs: ENA, ENB
Boot inputs: CBA, CBB
Phase inputs: PHA, PHB
Current-sense voltage: SA1, SA2, SB1, SB2
Power-good output: PGA, PGB
SYNC, EXTSUP
Enable input: ENC
Voltage sense: DS
DIV
Operating temperature: T_A
MIN
MAX UNIT
4
40
0
40
4
48
–0.6
40 V
0
11
0
11
0
9
0
9
40 V
0 VREG
–40
125 °C
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