TPS2592BA Datasheet, PDF (3/34 Pages) Texas Instruments – 5-V eFuse with Over Voltage Protection and Blocking FET Control

Not Recommended for New Designs
www.ti.com
6 Device Comparison Table
PART NUMBER
TPS2592BA
TPS2592BL
UV
4.3 V
4.3 V
OV CLAMP
6.1 V
6.1 V
TPS2592BA, TPS2592BL
SLVSCU2 – DECEMBER 2014
FAULT RESPONSE
Auto Retry
Latched
STATUS
Active
Active
7 Pin Configuration and Functions
10-Pin VSON
DRC Package
(Top View)
dV/dT 1
EN/UVLO
VIN
VIN
VIN ⁵
GND
10 ILIM
BFET
OUT
OUT
6 OUT
NAME
BFET
dV/dT
EN/UVLO
PIN
NUMBER
9
1
2
GND
ILIM
OUT
VIN
PowerPAD™
10
6-8
3-5
Pin Functions
DESCRIPTION
Connect this pin to the gate of a blocking NFET. See the Feature Description.
Tie a capacitor from this pin to GND to control the ramp rate of OUT at device turn-on.
This is a dual function control pin. When used as an ENABLE pin and pulled down, it shuts off the internal
pass MOSFET and pulls BFET to GND. When pulled high, it enables the device and BFET.
As an UVLO pin, it can be used to program different UVLO trip point via external resistor divider.
GND
A resistor from this pin to GND will set the overload and short circuit limit.
Output of the device
Input supply voltage
Copyright © 2014, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Links: TPS2592BA TPS2592BL