TPS25921A Datasheet, PDF (3/38 Pages) Texas Instruments – Precise Current Limit and Over Voltage Protection

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6 Pin Configuration and Functions
GND
SS
ENUV
IN
D Package
8-Pin SOIC
Top View
1
8
2
7
3
6
4
5
TPS25921A, TPS25921L
SLVSCE1C – AUGUST 2014 – REVISED NOVEMBER 2015
OVP
ILIM
FLT
OUT
NAME
GND
SS
ENUV
IN
OUT
FLT
ILIM
OVP
NUMBER
1
2
3
4
5
6
7
8
Pin Functions
DESCRIPTION
Ground.
A capacitor from this pin to GND sets the ramp rate of output voltage at device turn-on.
Input for setting programmable undervoltage lockout threshold. An undervoltage event will open internal FET and
assert FLT to indicate power-failure. When pulled to GND, resets the thermal fault latch in TPS25921L.
Power Input and supply voltage of the device.
Power Output of the device.
Fault event indicator, goes low to indicate fault condition due to Undervoltage, Overvoltage, and Thermal shutdown
event. A nuisance fast trip does not trigger fault. It is an open drain output.
A resistor from this pin to GND will set the overload and short circuit limit.
Input for setting programmable overvoltage protection threshold. An overvoltage event will open the internal FET and
assert FLT to indicate overvoltage.
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) ⁽¹⁾
IN, OUT, ENUV, OVP, FLT
Input voltage range
IN (10 ms Transient)
ILIM, SS
SS
Sink current
FLT
Source current
ILIM, SS, FLT
Maximum junction temperature, T_J
Storage temperature range, T_stg
VALUE ⁽²⁾
MIN
MAX
–0.3
20
22
–0.3
7
5
100
Internally Limited
Internally Limited
-65
150
UNIT
V
mA
mA
°C
°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any conditions beyond those indicated under recommended operating conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential voltages, are with respect to network ground terminal.
7.2 ESD Ratings
V_(ESD) Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾
Charged device model (CDM), per JEDEC specification JESD22-
C101 ⁽²⁾
VALUE
±2000
±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
UNIT
V
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