TL5002CDRG4 Datasheet, PDF (3/18 Pages) Texas Instruments – PULSE-SIDTH-MODULATION CONTROL CIRCUIT

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TL5002
PULSEĆWIDTHĆMODULATION CONTROL CIRCUIT
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SLVS304A − SEPTEMBER 2000 − REVISED AUGUST 2002
dead-time control (DTC) (continued)
ǒ Ǔ _{RDT + Rt ) 1250} ƪ_Dǒ_{Voscmax – Voscmin}Ǔ _{) Voscmin}ƫ
Where
R_DT and R_t are in ohms, D in decimal
Soft start can be implemented by paralleling the DTC resistor with a capacitor (C_DT) as shown in Figure 2. During
soft start, the voltage at DTC is derived by the following equation:
ǒ Ǔ VDT [ IDTRDT 1–e ^{ǒ–tńRDTCDTǓ}
CDT
6 _DTC
RDT
TL5002
Figure 2. Soft-Start Circuit
If the dc-to-dc converter must be in regulation within a specified period of time, the time constant, R_DTC_DT,
should be t₀/3 to t₀/5. The TL5002 remains off until V_DT ≈ 0.7 V, the minimum ramp value. C_DT is discharged
every time UVLO becomes active.
undervoltage-lockout (UVLO) protection
The undervoltage-lockout circuit turns the output transistor off whenever the supply voltage drops too low
(approximately 3 V at 25°C) for proper operation. A hysteresis voltage of 200 mV eliminates false triggering on
noise and chattering.
output transistor
The output of the TL5002 is an open-collector transistor with a maximum collector current rating of 21 mA and
a voltage rating of 51 V. The output is turned on under the following conditions: the oscillator triangle wave is
lower than both the DTC voltage and the error-amplifier output voltage, and the UVLO circuit is inactive.
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