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THS4042 Datasheet, PDF (3/33 Pages) National Semiconductor (TI) – 165-MHz C-STABLE HIGH-SPEED AMPLIFIER
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THS4041, THS4042
165ĆMHz CĆSTABLE HIGHĆSPEED AMPLIFIERS
SLOS237B− MAY 1999 − REVISED FEBRUARY 2000
DISSIPATION RATING TABLE
PACKAGE
θJA
(°C/W)
θJC
(°C/W)
TA = 25°C
POWER RATING
D
167†
38.3
740 mW
DGN‡
58.4
4.7
2.14 W
† This data was taken using the JEDEC standard Low-K test PCB. For the JEDEC proposed
High-K test PCB, the θJA is 95°C/W with a power rating at TA = 25°C of 1.32 W.
‡ This data was taken using 2 oz. trace and copper pad that is soldered directly to a 3 in. × 3 in.
PC. For further information, refer to Application Information section of this data sheet.
recommended operating conditions
Supply voltage, VCC+ and VCC−
Operating free-air temperature, TA
Dual supply
Single supply
C-suffix
I-suffix
MIN
±4.5
9
0
−40
NOM
MAX
±16
32
70
85
UNIT
V
°C
electrical characteristics at TA = 25°C, VCC = ±15 V, RL = 150 Ω (unless otherwise noted)
dynamic performance
PARAMETER
TEST CONDITIONS†
MIN TYP MAX
VCC = ±15 V Rf = 200 Ω
165
Gain = 1
Dynamic performance small-signal bandwidth VCC = ±5 V
Rf = 200 Ω
150
(−3 dB)
BW
Bandwidth for 0.1 dB flatness
VCC = ±15 V Rf = 1.3 kΩ
60
Gain = 2
VCC = ±5 V
Rf = 1.3 kΩ
60
VCC = ±15 V Rf = 200 Ω
45
VCC = ±5 V
Rf = 200 Ω
Gain = 1
45
Full power bandwidth§
VO(pp) = 20 V, VCC = ±15 V
6.3
VO(pp) = 5 V, VCC = ±5 V
20
SR Slew rate‡
VCC = ±15 V, 20-V step,
Gain = 5
400
VCC = ±5 V,
5-V step,
Gain = −1
325
Settling time to 0.1%
ts
Settling time to 0.01%
VCC = ±15 V, 5-V step
120
Gain = −1
VCC = ±5 V,
2-V step
120
VCC = ±15 V, 5-V step
250
VCC = ±5 V,
2-V step
Gain = −1
280
† Full range = 0°C to 70°C for C suffix and − 40°C to 85°C for I suffix
‡ Slew rate is measured from an output level range of 25% to 75%.
§ Full power bandwidth = slew rate / 2 π VO(Peak).
UNIT
MHz
MHz
MHz
MHz
V/µs
ns
ns
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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