SN75LVDS83C Datasheet, PDF (3/26 Pages) Texas Instruments – FLATLINK™ TRANSMITTER

SN75LVDS83C
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SLLSE66A – OCTOBER 2010 – REVISED SEPTEMBER 2011
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
MIN
Supply voltage, VCC
2.8
LVDS output Supply voltage, LVDSVCC
2.8
PLL analog supply voltage, PLLVCC
2.8
IO input reference supply voltage, IOVCC
1.62
Power supply noise on any VCC terminal
IOVCC = 1.8V IOVCC/2 + 0.3V
High-level input voltage, V_IH
IOVCC = 2.5V
IOVCC = 3.3V
IOVCC/2 + 0.4V
IOVCC/2 + 0.5V
IOVCC = 1.8V
Low-level input voltage, V_IL
IOVCC = 2.5V
IOVCC = 3.3V
Differential load impedance, Z_L
90
Operating free-air temperature, T_A
-10
NOM
3.3
3.3
3.3
1.8 / 2.5 / 3.3
MAX
3.6
3.6
3.6
3.6
0.1
IOVCC/2 - 0.3V
IOVCC/2 - 0.4V
IOVCC/2 - 0.5V
132
70
UNIT
V
V
V
Ω
C
THERMAL INFORMATION
θ_JA
θ_JCtop
θ_JB
ψ_JT
ψ_JB
θ_JCbot
THERMAL METRIC⁽¹⁾
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
SN75LVDS83C
ZQL (56 PINS)
67.1
25.2
31.0
0.8
30.3
n/a
UNIT
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
TIMING REQUIREMENTS
PARAMETER
Input clock period, t_c
Input clock modulation
with modulation frequency 30kHz
with modulation frequency 50kHz
High-level input clock pulse width duration, t_w
Input signal transition time, t_t
Data set up time, D0 through D27 before CLKIN (See Figure 3)
Data hold time, D0 through D27 after CLKIN
MIN
11.76
0.4 t_c
2
0.8
MAX
100
8%
6%
0.6 t_c
3
UNIT
ns
ns
ns
ns
ns
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