SN74LVTH18646A-EP Datasheet, PDF (3/41 Pages) Texas Instruments – 3.3-V ABT SVAN TEST DEVICES WITH 18-BIT TRANSCEIVERS AND REGISTERS

SN74LVTH18646AĆEP, SN74LVTH182646AĆEP
3.3ĆV ABT SCAN TEST DEVICES
WITH 18ĆBIT TRANSCEIVERS AND REGISTERS
SCAS745A − DECEMBER 2003 − REVISED APRIL 2004
PM PACKAGE
(TOP VIEW)
1A3
1A4
1A5
GND
1A6
1A7
1A8
1A9
V_CC
2A1
2A2
2A3
GND
2A4
2A5
2A6
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
1B4
1B5
1B6
GND
1B7
1B8
1B9
V_CC
2B1
2B2
2B3
2B4
GND
2B5
2B6
2B7
FUNCTION TABLE
(normal mode, each 9-bit section)
INPUTS
DATA I/O
OE
DIR CLKAB CLKBA SAB SBA
A1−A9
B1−B9
X
X
↑
X
X
X
Input
Unspecified†
X
X
X
↑
X
X
Unspecified†
Input
OPERATION OR FUNCTION
Store A, B unspecified†
Store B, A unspecified†
H
X
↑
↑
X
X
Input
Input
Store A and B data
H
X
H or L H or L
X
X
Input disabled Input disabled
Isolation, hold storage
L
L
X
X
X
L
Output
Input
Real-time B data to A bus
L
L
X
H or L
X
H
Output
Input disabled
Stored B data to A bus
L
H
X
X
L
X
Input
Output
Real-time A data to B bus
L
H
H or L
X
H
X
Input disabled
Output
Stored A data to B bus
† _{The data-output functions can be enabled or disabled by various signals at OE and DIR. Data-input functions always are enabled; i.e., data at}
the bus terminals is stored on every low-to-high transition of the clock inputs.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3