MSP430F2274-EP_14 Datasheet, PDF (3/81 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F2274-EP
www.ti.com
DA PACKAGE
(TOP VIEW)
TEST/SBWTCK 1
DVCC ²
P2.5/Rosc 3
DVSS ⁴
XOUT/P2.7 ⁵
XIN/P2.6 6
RST/NMI/SBWTDIO 7
P2.0/ACLK/A0/OA0I0 8
P2.1/TAINCLK/SMCLK/A1/OA00 9
P2.2/TA0/A2/OA0I1 10
P3.0/UCB 0STE/UCA 0CLK/A5 11
P3.1/UCB 0SIMO/UCB 0SDA 12
P3.2/UCB 0SOMI/UCB 0SCL 13
P3.3/UCB 0CLK/UCA 0STE 14
AVSS 15
AVCC ¹⁶
P4.0/TB0 17
P4.1/TB1 18
P4.2/TB2 19
SLAS614D – SEPTEMBER 2008 – REVISED MAY 2011
38 P1.7/TA2/TDO/TDI
37 P1.6/TA1/TDI
36 P1.5/TA0/TMS
35 P1.4/SMCLK/TCK
34 P1.3/TA2
33 P1.2/TA1
32 P1.1/TA0
31 P1.0/TACLK/ADC 10CLK
30 P2.4/TA2/A4/VREF+/VeREF+/OA1I0
29 P2.3/TA1/A3/VREF-/VeREF-/OA1I1/OA10
28 P3.7/A7/OA1I2
27 _{P3.6/A6/OA0I2}
26 _{P3.5/UCA0RXD/UCA0SOMI}
25 _{P3.4/UCA0TXD/UCA0SIMO}
24 _P4.7/TBCLK
23 P4.6/TBOUTH/A15/OA1I3
22 _{P4.5/TB2/A14/OA1I3}
21 P4.4/TB1/A13/OA1O
20 P4.3/TB0/A12/OA0O
FUNCTIONAL BLOCK DIAGRAM
VCC
VSS
XIN
XOUT
Basic Clock
System+
ACLK
SMCLK
MCLK
Flash
32kB
16kB
8kB
16MHz
CPU
incl. 16
Registers
MAB
MDB
RAM
1kB
512B
512B
Emulation
(2BP)
JTAG
Interface
Spy−Bi Wire
Brownout
Protection
P1.x/P2.x
2x8
P3.x/P4.x
2x8
ADC10
10−Bit
12
Channels,
Autoscan,
DTC
OA0, OA1
2 Op Amps
Ports P1/P2
2x8 I/O
Interrupt
capability,
pull−up/down
resistors
Ports P3/P4
2x8 I/O
pull−up/down
resistors
Watchdog
WDT+
15/16−Bit
Timer_A3
3 CC
Registers
Timer_B3
3 CC
Registers,
Shadow
Reg
USCI_A0:
UART/LIN,
IrDA, SPI
USCI_B0:
SPI, I2C
RST/NMI
NOTE: See port schematics section for detailed I/O information.
Copyright © 2008–2011, Texas Instruments Incorporated
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