DS90LV804_16 Datasheet, PDF (3/15 Pages) Texas Instruments – 4-Channel 800 Mbps LVDS Buffer/Repeater

DS90LV804
www.ti.com
SNLS195L – SEPTEMBER 2005 – REVISED APRIL 2013
Recommended Operating Conditions
Supply Voltage (V_CC)
Input Voltage (V_I)⁽¹⁾
Output Voltage (V_O)
Operating Temperature (T_A)
(1) V_ID max < 2.4V
Industrial
3.15V to 3.45V
0V to V_DD
0V to V_DD
−40°C to +85°C
Electrical Characteristics
Over recommended operating supply and temperature ranges unless other specified.
Symbol
Parameter
Conditions
Min Typ⁽¹⁾ Max Units
LVTTL DC SPECIFICATIONS (EN)
V_IH
High Level Input Voltage
V_IL
Low Level Input Voltage
I_IH
High Level Input Current
I_IL
Low Level Input Current
C_IN1
Input Capacitance
V_CL
Input Clamp Voltage
LVDS INPUT DC SPECIFICATIONS (INn±)
V_IN = V_DD = V_DDMAX
V_IN = V_SS, V_DD = V_DDMAX
Any Digital Input Pin to V_SS
I_CL = −18 mA
2.0
GND
V_DD
V
0.8
V
−10
+10
µA
−10
+10
µA
3.5
pF
−1.5 −0.8
V
V_TH
Differential Input High Threshold⁽²⁾
V_CM = 0.8V to 3.4V,
V_DD = 3.45V
V_TL
Differential Input Low Threshold⁽²⁾
V_CM = 0.8V to 3.4V,
V_DD = 3.45V
V_ID
Differential Input Voltage
V_CM = 0.8V to 3.4V, V_DD = 3.45V
V_CMR
Common Mode Voltage Range
V_ID = 150 mV, V_DD = 3.45V
C_IN2
Input Capacitance
IN+ or IN− to V_SS
I_IN
Input Current
V_IN = 3.45V, V_DD = V_DDMAX
V_IN = 0V, V_DD = V_DDMAX
LVDS OUTPUT DC SPECIFICATIONS (OUTn±)
V_OD
Differential Output Voltage⁽²⁾
ΔV_OD
V_OS
Change in V_OD between
Complementary States
Offset Voltage⁽³⁾
R_L = 100Ω external resistor between OUT+ and
OUT−
ΔV_OS
Change in V_OS between
Complementary States
0
100
mV
−100
0
mV
100
2400 mV
0.05
3.40
V
3.5
pF
−10
+10
µA
−10
+10
µA
250
500
600
mV
−35
35
mV
1.05 1.18 1.475
V
−35
35
mV
I_OS
Output Short Circuit Current
C_OUT2 Output Capacitance
SUPPLY CURRENT (Static)
OUT+ or OUT− Short to GND
OUT+ or OUT− to GND when TRI-STATE
−60
−90
mA
5.5
pF
I_CC
Total Supply Current
All inputs and outputs enabled and active,
terminated with external differential load of 100Ω
between OUT+ and OUT-.
117
140
mA
I_CCZ
TRI-STATE Supply Current
EN = 0V
2.7
6
mA
(1) Typical parameters are measured at V_DD = 3.3V, T_A = 25°C. They are for reference purposes, and are not production-tested.
(2) Differential output voltage V_OD is defined as ABS(OUT+–OUT−). Differential input voltage V_ID is defined as ABS(IN+–IN−).
(3) Output offset voltage V_OS is defined as the average of the LVDS single-ended output voltages at logic high and logic low states.
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