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| DS90CP22MX-8 Datasheet, PDF (3/17 Pages) Texas Instruments – DS90CP22 800 Mbps 2x2 LVDS Crosspoint Switch | |||
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DS90CP22
www.ti.com
SNLS053E â MARCH 2000 â REVISED APRIL 2013
Electrical Characteristics(1)
Over recommended operating supply and temperature ranges unless otherwise specified
Symbol
Parameter
Conditions
CMOS/TTL DC SPECIFICATIONS (EN0,EN1,SEL0,SEL1)
VIH
High Level Input Voltage
VIL
Low Level Input Voltage
IIH
High Level Input Current
IIL
Low Level Input Current
VCL
Input Clamp Voltage
LVDS OUTPUT DC SPECIFICATIONS (OUT0,OUT1)
VIN = 3.6V or 2.0V; VCC = 3.6V
VIN = 0V or 0.8V; VCC = 3.6V
ICL = â18 mA
VOD
Differential Output Voltage
RL = 75Ω
RL = 75Ω, VCC = 3.3V, TA = 25°C
ÎVOD
VOS
Change in VOD between Complimentary Output States
Offset Voltage(2)
ÎVOS
Change in VOS between Complimentary Output States
IOZ
Output TRI-STATE Current
TRI-STATE Output,
VOUT = VCC or GND
IOFF
Power-Off Leakage Current
VCC = 0V; VOUT = 3.6V or GND
IOS
Output Short Circuit Current
VOUT+ OR VOUTâ = 0V
IOSB
Both Outputs Short Circuit Current
VOUT+ AND VOUTâ = 0V
LVDS RECEIVER DC SPECIFICATIONS (IN0,IN1)
VTH
VTL
VCMR
IIN
Differential Input High Threshold
Differential Input Low Threshold
Common Mode Voltage Range
Input Current
SUPPLY CURRENT
VCM = +0.05V or +1.2V or +3.25V,
Vcc = 3.3V
VID = 100mV, Vcc = 3.3V
VIN = +3.0V, VCC = 3.6V or 0V
VIN = 0V, VCC = 3.6V or 0V
ICCD
Total Supply Current
ICCZ
TRI-STATE Supply Current
RL = 75Ω, CL = 5 pF, EN0 = EN1 = High
EN0 = EN1 = Low
(1) All typical are given for VCC = +3.3V and TA = +25°C, unless otherwise stated.
(2) VOS is defined and measured on the ATE as (VOH + VOL) / 2.
Min
2.0
GND
270
285
1.0
â100
0.05
Typ
+7
±1
â0.8
365
365
1.2
±1
±1
â15
â30
0
0
±1
±1
98
43
Max Units
VCC
V
0.8
V
+20
μA
±10
μA
â1.5
V
475
mV
440
mV
35
mV
1.45
V
35
mV
±10
μA
±10
μA
â25
mA
â50
mA
+100 mV
mV
3.25
V
±10
μA
±10
μA
125
mA
55
mA
AC Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified(1)
Symbol
TSET
THOLD
TSWITCH
TPHZ
TPLZ
TPZH
TPZL
TLHT
THLT
Parameter
Input to SEL Setup Time(2), (Figure 3 and Figure 4)
Input to SEL Setup Time(2), (Figure 3 and Figure 4)
SEL to Switched Output, (Figure 3 and Figure 4)
Disable Time (Active to TRI-STATE) High to Z, Figure 5
Disable Time (Active to TRI-STATE) Low to Z, Figure 5
Enable Time (TRI-STATE to Active) Z to High, Figure 5
Enable Time (TRI-STATE to Active) Z to Low, Figure 5
Output Low-to-High Transition Time, 20% to 80%, Figure 7
Output High-to-Low Transition Time, 80% to 20%, Figure 7
Conditions
Min
Typ
Max Units
0.7
0.5
ns
1.0
0.5
ns
0.9
1.2
1.7
ns
2.1
4.0
ns
3.0
4.5
ns
25.5 55.0
ns
25.5 55.0
ns
290
400
580
ps
290
400
580
ps
(1) The parameters are specified by design. The limits are based on statistical analysis of the device performance over PVT (process,
voltage and temperature) range.
(2) TSET and THOLD time specify that data must be in a stable state before and after the SEL transition.
Copyright © 2000â2013, Texas Instruments Incorporated
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