DLPA2000 Datasheet, PDF (3/58 Pages) Texas Instruments – Power Management and LED/Lamp Driver IC

www.ti.com
5 Pin Configuration and Functions
YFF PACKAGE
56-PIN DSGBA
BOTTOM VIEW
DLPA2000
DLPS043A – JUNE 2014 – REVISED AUGUST 2015
H
SW6
RLIM
V6V
AOUT2 VINM
VINC
SWC
G
SW5
RLIM
RBOT_
K
AOUT1
BOUT2
VCORE
PGND
CM
F
SW4
RLIM_
K
LED_
SEL1
LED_
SEL0
BOUT1
LS_IN
LS_
OUT
E
VLED
VLED
SENS1
SENS2
PROJ_
ON
DGND
V2V5
D
L2
L2
VSPI
CMP_
OUT
PWM_
IN
AGND
VINA
C
PGNDL PGNDL
SPI_
CLK
SPI_
CSZ
SPI_
DIN
SPI_
DOUT
VOFS
B
L1
L1
RESET
Z
INTZ
CNTR_
VRST
REF_
VRST
VBIAS
A
VINL
VINL AGND1 VINR
SWN PGNDR SWP
PIN
NAME
NUMBER
A1
VINL
A2
AGND1
A3
VINR
A4
SWN
A5
PGNDR
A6
SWP
A7
B1
L1
B2
RESETZ
B3
INTZ
B4
CNTR_VRST
B5
REF_VRST
B6
VBIAS
B7
C1
PGNDL
C2
SPI_CLK
C3
SPI_CSZ
C4
SPI_DIN
C5
1
I/O
234567
Pin Functions
DESCRIPTION
I
Power supply input for VLED BUCK-BOOST power stage. Connect to system power.
GND
I
I
GND
O
Analog ground. Connect to ground plane.
Power supply input for DMD switch mode power supply (SMPS). Connect to system power.
Connection for the DMD SMPS-inductor (high-side switch).
Power ground for DMD SMPS. Connect to ground plane.
Connection for the DMD SMPS-inductor (low-side switch).
O Connection for VLED BUCK-BOOST inductor.
O Reset output to the DLP system (active low). Pin is held low to reset DLP system.
O Interrupt output signal (open drain). Connect to pullup resistor or short to ground.
O Connection to VRST for fast discharge function
I
Reference pin for the VRST regulator. Connect to VRST rail through 100-kΩ resistor.
O VBIAS output rail. Connect to ceramic capacitor.
GND Power ground for VLED BUCK-BOOST. Connect to ground plane.
I
Clock input for SPI interface
I
SPI chip select (active low)
I
SPI data input
Copyright © 2014–2015, Texas Instruments Incorporated
Product Folder Links: DLPA2000
Submit Documentation Feedback
3