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| CDCV304-EP Datasheet, PDF (3/13 Pages) Texas Instruments – 200-MHz GENERAL-PURPOSE CLOCK BUFFER, PCI-X COMPLIANT | |||
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www.ti.com
CDCV304-EP
SCAS927A â MARCH 2012
THERMAL INFORMATION
THERMAL METRIC(1)
θJA
θJCtop
θJB
ÏJT
ÏJB
Junction-to-ambient thermal resistance(2)
Junction-to-case (top) thermal resistance(3)
Junction-to-board thermal resistance(4)
Junction-to-top characterization parameter(5)
Junction-to-board characterization parameter(6)
CDCV304
PW
8 PINS
175.8
61.8
104.3
7.7
102.6
UNITS
°C/W
xxx
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter, ÏJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, ÏJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7).
RECOMMENDED OPERATING CONDITIONS
Supply voltage, VDD
Low-level input voltage, VIL
High-level input voltage, VIH
Input voltage, VI
High-level output current, IOH
Low-level output current, IOL
Operating free-air temperature, TA
VDD = 2.5 V
VDD = 3.3 V
VDD = 2.5 V
VDD = 3.3 V
MIN
2.3
0.7 x VDD
0
â40
NOM
MAX
3.6
0.3 x VDD
VDD
â12
â24
12
24
105
UNIT
V
V
V
V
mA
mA
°C
TIMING REQUIREMENTS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
fclk
Clock frequency
MIN
TYP
MAX UNIT
0
200 MHz
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): CDCV304-EP
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